A low-voltage low-distortion MOS sampling switch

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 3131-3134

  Yang, Chun Yueh ^a   Hung, Chung Chih ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH RESOLUTION; LOW-DISTORTION; LOW-VOLTAGE; NON-LINEARITY; SAMPLE-AND-HOLD CIRCUITS; SAMPLING SWITCHES; STANDARD CMOS TECHNOLOGY; SWITCHED CAPACITOR CIRCUITS; TOTAL HARMONIC DISTORTIONS;

CMOS INTEGRATED CIRCUITS;

EID: 33750555638     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465291     Document Type: Conference Paper

References (5)

1. A. M. Abo and P. R.Gray, "A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter," IEEE Journal of Solid-State Circuits, Volume 34, Issue 5, pp.599-605, May 1999.
2. J. Steensgaard, "Bootstrapped low-voltage analog switches," Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, Volume 2, pp.29- 32, May 30 - June 2, 1999.
3. A. K. Ong, V. I. Prodanov, and M. Tarsia, "A method for reducing the variation in "on" resistance of a MOS sampling switch," Proceedings of the 2000 IEEE International Symposium on Circuits and Systems, Volume 5, pp.437 - 440, May 2000.
4. Kim Sangwook and Greeneich, "Body effect compensated switch for low voltage switched-capacitor circuits," Proceedings of the 2002 IEEE International Symposium on Circuits and Systems, Volume 4, pp.437-440, May 26-29, 2002.
5. S. R. Sonkusale and J. Van der Spiegel, "A low distortion MOS sampling circuit," Proceedings of the 2002 IEEE International Symposium on Circuits and Systems, Volume 5, pp.585-588, May 26-29, 2002.