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Volumn 2005, Issue , 2005, Pages 53-57

A parallel image compression system for high-speed cameras

Author keywords

[No Author keywords available]

Indexed keywords

ALIGNMENT; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HIGH SPEED CAMERAS; IMAGE CODING; IMAGE COMPRESSION; PARALLEL PROCESSING SYSTEMS; SIGNAL TO NOISE RATIO;

EID: 33847235723     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (11)
  • 1
    • 33847215362 scopus 로고    scopus 로고
    • http://www.fillfactory.com/htm/traok_record/
  • 2
    • 0035693590 scopus 로고    scopus 로고
    • A 10000 Frames/s CMOS Digital Pixel Sensor
    • Deoember
    • Stuart Kleinfelder, et al., "A 10000 Frames/s CMOS Digital Pixel Sensor," IEEE J. Solid-state circuits, Vol.36, No12, pp.2049-2059, Deoember(2001)
    • (2001) IEEE J. Solid-state circuits , vol.36 , Issue.NO12 , pp. 2049-2059
    • Kleinfelder, S.1
  • 3
    • 33847202490 scopus 로고    scopus 로고
    • ISO-IEC/JTC1/SC2/WG10 Joint Photograph Experts Group. CD1091R-1, Digital compression and coding of continuous-tone still images, Mar. 1991.
    • ISO-IEC/JTC1/SC2/WG10 Joint Photograph Experts Group. CD1091R-1, "Digital compression and coding of continuous-tone still images," Mar. 1991.
  • 4
    • 33847242856 scopus 로고    scopus 로고
    • ISO-IEC/JTC1/SC2/WG11 Moving Picture Experts Group, 90/176 Rev.2 Dec. 1990
    • ISO-IEC/JTC1/SC2/WG11 Moving Picture Experts Group, 90/176 Rev.2 Dec. 1990
  • 5
    • 33847184479 scopus 로고    scopus 로고
    • V.Bhaskaran and K.Konstaninides, Image and Video Compression Standards. -Algorithm and Architectures-, Kluwer Academic Publish(2002)
    • V.Bhaskaran and K.Konstaninides, "Image and Video Compression Standards. -Algorithm and Architectures-", Kluwer Academic Publish(2002)
  • 7
    • 0001718975 scopus 로고
    • On the Realization of Disoreate Cosine Transform Using the Distributed Arithmetic
    • September
    • Yuk-Hee Chan, et al., "On the Realization of Disoreate Cosine Transform Using the Distributed Arithmetic," IEEE Trans. On Circuit and Systems, Vol.39, No9, pp.705-712, September(1992)
    • (1992) IEEE Trans. On Circuit and Systems , vol.39 , Issue.NO9 , pp. 705-712
    • Chan, Y.1
  • 8
    • 0031332529 scopus 로고    scopus 로고
    • A CMOS Image Sensor with Analog Two-Dimensional DCT-Based Compression Circuits for One-Chip Cameras
    • December
    • Shoji Kawahito, et al, "A CMOS Image Sensor with Analog Two-Dimensional DCT-Based Compression Circuits for One-Chip Cameras." IEEE J. Solid-state circuits, Vol.32, No. 12, December (1997)
    • (1997) IEEE J. Solid-state circuits , vol.32 , Issue.12
    • Kawahito, S.1
  • 9
    • 0024646951 scopus 로고    scopus 로고
    • M.T.Sun,T,C.Chen, and A.M.Gottlieb, VLSI implementation of a $16 times16$ discrete cosine transform, IEEE trans. Circuits Syst., Vo136, No4, pp.610-617, Apr. 1989.
    • M.T.Sun,T,C.Chen, and A.M.Gottlieb, "VLSI implementation of a $16 times16$ discrete cosine transform," IEEE trans. Circuits Syst., Vo136, No4, pp.610-617, Apr. 1989.
  • 10
    • 0026854652 scopus 로고
    • A 100-MHz 2-D Discrete Cosine Transform Core Processor
    • April
    • Shin-ichi Uramoto, et al., "A 100-MHz 2-D Discrete Cosine Transform Core Processor," IEEE J. Solid-state circuits, Vol.27, No.4, pp.492-499, April(1992)
    • (1992) IEEE J. Solid-state circuits , vol.27 , Issue.4 , pp. 492-499
    • Uramoto, S.1
  • 11
    • 33847222986 scopus 로고    scopus 로고
    • http://www.opencores.org/


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.