SoC leakage power reduction algorithm by input vector control

2005 International Symposium on System-on-Chip, Proceedings

Volumn 2005, Issue , 2005, Pages 86-89

  Xiaotao, Chang ^a   Dongrui, Fan ^a   Yinhe, Han ^a   Zhang, Zhimin ^a  

^a INSTITUTE OF COMPUTING TECHNOLOGY   (China)

Author keywords

Gate level simulator; Input vector control; Leakage power; Low power design; SoC

Indexed keywords

ALGORITHMS; BENCHMARKING; COMBINATORIAL CIRCUITS; EMBEDDED SYSTEMS; MATHEMATICAL MODELS; PROBABILITY; VECTORS;

GATE LEVEL SIMULATOR; INPUT VECTOR CONTROL; LEAKAGE POWER; LOW POWER DESIGN;

LEAKAGE CURRENTS;

EID: 33847223820     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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