XDXMOS: A novel technique for the double-gate MOSFETs logic circuits - /To achieve high drive current and small input capacitance together

Proceedings of the Custom Integrated Circuits Conference

Volumn 2005, Issue , 2005, Pages 247-250

  Koike, Hanpei ^a   Sekigawa, Toshihiro ^a  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE CONTROL SYSTEMS; CAPACITANCE; COMPUTER SIMULATION; FORMAL LOGIC;

CROSS-DRIVE XMOS (XDXMOS); MIXED MODE CIRCUITS;

MOSFET DEVICES;

EID: 33847171948     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568653     Document Type: Conference Paper

References (4)

1. I. Aller, "The Double-Gate FinFET: Device Impact On Circuit Design " in ISSCC 2003 Tech.Dig..Visual Sup., pp.655-657, 2003.
2. Y. Liu, M. Masahara, K. Ishii, T. Tsutsumi, T. Sekigawa, H. Takashima, H. Yamauchi, and E. Suzuki, "Flexible Threshold Voltage FinFETs with Independent double Gates and an Ideal rectangular Cross-section Si-Fin Channel" in IEDM Tech.Dig., pp.986-988, 2003.
3. T. Kuroda et al., "A 0.9V, 150Mhz , 10mW, 4mm2 2D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage (VT) Scheme" in IEEE JSSC, Vol.31, No.11., pp.1770-1779, Nov. 1996.
4. ATLAS User's Manual, Chap.11, MixedMode: Mixed Circuit and Device Simulator, SILVACO International, 2002.