Low power CMOS adaptive electronic central pattern generator design

Midwest Symposium on Circuits and Systems

Volumn 2005, Issue , 2005, Pages 1350-1353

  Lee, Young Jun ^a   Lee, Jihyun ^a   Kim, Yong Bin ^a   Ayers, Joseph ^a  

^a NORTHEASTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONIC CENTRAL PATTERN GENERATOR DESIGN; HINDMARSH ROSE NEURON MODEL; POWER CONSUMPTION; SYNAPSE CIRCUITS;

ADAPTIVE SYSTEMS; ANALOG TO DIGITAL CONVERSION; ELECTRIC POWER UTILIZATION; INTELLIGENT ROBOTS; MATHEMATICAL MODELS; VLSI CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 33847155984     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSCAS.2005.1594360     Document Type: Conference Paper

References (10)

1. Ayers, J., J. Davis, A. Rudolph, "Neurotechnology for Biomimetic Robots", MIT Press, 2002.
2. Ayers, J. "Architectures for Adaptive Behavior in Biomimetic Underwater Robots", IXSn: Bio-mechanisms of Swimming and Flying. N. Kato, Ayers, J., SMorikawa, H. Tokyo, Springer-Verlag: 171-187. 2004.
3. J. Ayers, Yong-Bin Kim, et. al, "An Adaptive Controller for a Biomimetic Underwater Robot based on Winnerless Competition in Chaotic Electronic Neuronal Networks", DARPA Proposal. 2002.
4. Delcomyn, F. "Neural basis of rhythmic behavior in animals.", Science 210(4469): 492-8. 1980.
5. Delcomyn, F. "New Approaches to Robotics.", Science 253: 1227-1232. 1991.
6. Ayers, J., Volkovskii, A., Rulkov, N., Selverston, A., Arshavski, Y., Abarbanel, H.D.I. and Rabinovich, M. "Neurotechnology: Synthetic Neuroscience for Robotics", in preparation. 2004
7. Pinto, R. D., P. Varona, A. R. Volkovskii, A. Szucs, H. D. Abarbanel and M. I. Rabinovich, "Synchronous behavior of two coupled electronic neurons.", Phys Rev E. 62(2 Pt B): 2644-56. 2000.
8. J. L. Hindmarsh and R. M. Rose, "A Model of Neuronal Bursting using Three Coupled First Order Differential Equations", Proceedings of the Royal Society of London, pp.87-102, 1984
9. Young Jun Lee, Jihyun Lee, Yong-Bin Kim, et. al "Low Power Real Time Electronic Neuron VLSI Design Using Subthreshold Technique", Proceedings of IEEE International Symposium on Circuits and Systems, Vol.4, May 2004, pp.744-747
10. Young Jun Lee, Jihyun Lee, Yong-Bin Kim, et. al "Test Methodology for Low Power VLSI Neural Oscillator Circuit", Proceedings of IEEE Instrumentation and Measurement Technology Conference, May 2004, pp1546-1550