메뉴 건너뛰기




Volumn 2005, Issue , 2005, Pages 289-292

Generalized method of the time-domain circuit simulation based on LIM with MNA formulation

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; TIME DOMAIN ANALYSIS;

EID: 33847153097     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568662     Document Type: Conference Paper
Times cited : (18)

References (7)
  • 1
    • 0035087173 scopus 로고    scopus 로고
    • Latency Insertion Method (LIM) for the Fast Transient Simulation of Large Networks
    • Jan
    • J. E. Shutt-Ainé, "Latency Insertion Method (LIM) for the Fast Transient Simulation of Large Networks," IEEE Trans. Circuits and Systems-I, vol. 48, no.1 pp. 81-89, Jan. 2001.
    • (2001) IEEE Trans. Circuits and Systems-I , vol.48 , Issue.1 , pp. 81-89
    • Shutt-Ainé, J.E.1
  • 3
    • 84894021661 scopus 로고
    • Numerical Solution of Initial Boundary Value Problems Involving Maxwell's Equations in Isotropic Media
    • K. S. Yee, "Numerical Solution of Initial Boundary Value Problems Involving Maxwell's Equations in Isotropic Media," IEEE Trans. Antennas Propagat., 14, 4, pp.302-207, 1966.
    • (1966) IEEE Trans. Antennas Propagat , vol.14 , Issue.4 , pp. 302-207
    • Yee, K.S.1
  • 4
    • 0002941113 scopus 로고    scopus 로고
    • Synthesis of time-domain models for interconnects having 3-D structure based on FDTD method
    • April
    • T. Watanabe and H. Asai, "Synthesis of time-domain models for interconnects having 3-D structure based on FDTD method", IEEE Trans. Circuits and Syst. -II, vol. 47, no. 4, pp. 302-305, April 2000.
    • (2000) IEEE Trans. Circuits and Syst. -II , vol.47 , Issue.4 , pp. 302-305
    • Watanabe, T.1    Asai, H.2
  • 5
    • 0016519919 scopus 로고
    • The modified nodal approach to network analysis
    • June
    • C. W. Ho, A. E. Ruehli, and P. A. Brennan, "The modified nodal approach to network analysis," IEEE Trans. Circuits and Systems, vol. CAS-22, no. 6, pp. 504-509, June 1975.
    • (1975) IEEE Trans. Circuits and Systems , vol.CAS-22 , Issue.6 , pp. 504-509
    • Ho, C.W.1    Ruehli, A.E.2    Brennan, P.A.3
  • 6
    • 0036911569 scopus 로고    scopus 로고
    • INDUCTWISE: Inductance-wise interconnect simulator and extractor
    • T. H. Chen, C. Luk, H. Kim, and C. C.-P. Chen, "INDUCTWISE: inductance-wise interconnect simulator and extractor," in Proc. ICCAD, pp. 215-220, 2002.
    • (2002) Proc. ICCAD , pp. 215-220
    • Chen, T.H.1    Luk, C.2    Kim, H.3    Chen, C.C.-P.4
  • 7
    • 16244417782 scopus 로고    scopus 로고
    • Fast simulation of VLSI interconnects
    • J. Jain, C.-K. Koh, and V. Balakrishnan, "Fast simulation of VLSI interconnects," in Proc. ICCAD, pp. 93-98, 2004.
    • (2004) Proc. ICCAD , pp. 93-98
    • Jain, J.1    Koh, C.-K.2    Balakrishnan, V.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.