A 50MS/S 12-bit CMOS pipeline A/D converter with nonlinear background calibration

Proceedings of the Custom Integrated Circuits Conference

Volumn 2005, Issue , 2005, Pages 399-402

  Yuan, J ^a   Farhat, N ^a   Van Der Spiegel, J ^a  

^a UNIVERSITY OF PENNSYLVANIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CALIBRATION; CMOS INTEGRATED CIRCUITS; ERROR ANALYSIS; ESTIMATION; OPTICAL RESOLVING POWER; SIGNAL TO NOISE RATIO;

BACKGROUND CALIBRATION METHOD; ERROR PATTERN ESTIMATION; SAMPLING RATE;

ANALOG TO DIGITAL CONVERSION;

EID: 33847102303     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568689     Document Type: Conference Paper

References (3)

1. J. Yuan, N. Farhat and J. Van der Spiegel, "GBOPCAD: A Synthesis Tool for High-Performance Gain-Boosted OPAMP Design", IEEE Trans. Circuits and Systems I, In Press
2. B. Murmann and B. Boser, "A 12-bit 75-MS/s Pipelined ADC Using Open-Loop Residue Amplification", IEEE J. Solid-State Circuits, Vol. 38, pp. 2040-2050, Dec. 2003
3. X. Wang, P. Hurst and S. Lewis, "A 12-Bit 20-Msample/s Pipelined Analog-to-Digital Converter With Nested Digital Background Calibration", IEEE J. Solid-State Circuits, Vol. 39, pp. 1799-1808, Nov. 2004