Hardware-oriented region based algorithm for low power motion estimation

International Symposium on Image and Signal Processing and Analysis, ISPA

Volumn 2001-January, Issue , 2001, Pages 283-288

  Fermo, Andrea ^a   Sicuranza, Giovanni L ^a   Pahor, Vojko ^b  

^a UNIVERSITY OF TRIESTE   (Italy)

^b Telit Mobile Terminals SpA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 33846973407     PISSN: 18455921     EISSN: 18492266     Source Type: Conference Proceeding    
DOI: 10.1109/ISPA.2001.938642     Document Type: Conference Paper

References (9)

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9. V. G. Moshnyaga, K. Nakasima "Reduction of Background Computations in Adaptive Block Matching Motion estimation", IEEE International Symposium on Circuits and Systems, pp. I667-670 May 2000, Geneva, Switzerland