Optimizing register binding in FPGAs using simulated annealing

Proceedings - ReConFig 2005: 2005 International Conference on Reconfigurable Computing and FPGAs

Volumn 2005, Issue , 2005, Pages

  Avakian, Annie ^a   Ouaiss, Iyad ^a  

^a LEBANESE AMERICAN UNIVERSITY   (Lebanon)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; FORMAL LOGIC; MICROPROCESSOR CHIPS; OPTIMIZATION; SIMULATED ANNEALING;

CLIQUE PARTITIONING; MEMORY BINDING; MULTIPLEXERS; ON-CHIP MEMORY BANKS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 33846968806     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RECONFIG.2005.27     Document Type: Conference Paper

References (12)

1. D. Gajski, N. Dutt, A. Wu, and S. Lin, "High-Level Syntheses" Kluwer Academic Publishers, Boston, 1992.
2. H. Al Atat and I. Ouaiss, "Register Binding for FPGAs with Embedded Memory," Proceedings of the Twelfth IEEE Workshop on FPGAs for Custom Computing Machines, IEEE Computer Society Press, April 2004.
3. G. De Micheli, "Synthesis and Optimization of Digital Circuits," McGraw-Hill, NewYork, 1994.
4. S. Kirkpatrick, C. D. Gelatt Jr., and M. P. Vecchi, "Optimization by Simulated Annealing," Science, 220, pp. 671-680, 1983.
5. J. Nestor and G. Krishnamoorthy, "SALSA: A New Approach to Scheduling with Timing Constraints," IEEE Trans. CAD, 12(8): 1107-1122, August 1993.
6. K. Ohmori. "High-level Synthesis Using A Genetic Algorithm." Electronics and Communications in Japan. Vol. 83 No. 4 (2000) 24-32
7. C.-J. Tseng and D. P. Siewiorek, "Automated Synthesis of Data Paths in Digital Systems," IEEE Trans. CAD, vol. CAD-5, no.3, pp. 379-395, July 1986.
8. C.Y. Huang, Y.S. Chen, Y.L. Lin, and Y.C. Hsu, "Data Path Allocation Based on Bipartite Weighted Matching," Proc. of the 27th Design Automation Conference, pp.499-504, 1990.
9. Chungi Lyuh and Taewhan Kim ; C. L. Liu, "An integrated data path optimization for low power based on network flow method ", International Conference on Computer Aided Design, pp.553-559, Nov. 2001
10. N. Ahmed, T. Natarajan, and K. R. Rao, "Discrete Cosine Transform" IEEE Trans. Comput., vol. C-23, no. 1, pp. 90-93, January. 1974.
11. Altera Corporation, "http://www.altera.com".
12. J. W. Cooley and J. W. Tukey, "An Algorithm for the Machine Calculation of Complex Fourier Series," Math. Comput. 19, pp. 297-301, 1965.