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Volumn 860, Issue , 2006, Pages 113-121

Architecture of the Compact Optoelectronic Integrated Neural (COIN) coprocessor

Author keywords

Mixed signal integrated circuits; Neural networks; VLSI

Indexed keywords


EID: 33846538568     PISSN: 0094243X     EISSN: 15517616     Source Type: Conference Proceeding    
DOI: 10.1063/1.2361212     Document Type: Conference Paper
Times cited : (3)

References (20)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.