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Volumn 31, Issue 1, 2006, Pages 31-40

Arithmetic formats for implementing artificial neural networks on FPGAs

Author keywords

Artificial neural networks; Fixed point arithmetic; Floating point arithmetic; FPGA

Indexed keywords

ARTIFICIAL INTELLIGENCE; DIGITAL ARITHMETIC; MATHEMATICAL OPERATORS; MULTIPLYING CIRCUITS; NEURAL NETWORKS; RESOURCE ALLOCATION;

EID: 33846098011     PISSN: 08408688     EISSN: None     Source Type: Journal    
DOI: 10.1109/CJECE.2006.259201     Document Type: Article
Times cited : (11)

References (8)
  • 2
    • 0034188008 scopus 로고    scopus 로고
    • On the design of IEEE compliant floating point units
    • May
    • G. Even and P. Wolfgang, "On the design of IEEE compliant floating point units," IEEE Trans. Comput., vol. 49, no. 5, May 2000, pp. 398-413.
    • (2000) IEEE Trans. Comput , vol.49 , Issue.5 , pp. 398-413
    • Even, G.1    Wolfgang, P.2
  • 4
    • 0026122066 scopus 로고
    • What every computer scientist should know about floating-point arithmetic
    • Mar
    • D. Goldberg, "What every computer scientist should know about floating-point arithmetic," ACM Computing Surveys, vol. 23, no. 1, Mar. 1991, pp. 5-48.
    • (1991) ACM Computing Surveys , vol.23 , Issue.1 , pp. 5-48
    • Goldberg, D.1
  • 5
    • 33846322727 scopus 로고    scopus 로고
    • ANSI/IEEE Std 754-1985, IEEE Standard for Binary Floating Point Arithmetic, 1985.
    • ANSI/IEEE Std 754-1985, IEEE Standard for Binary Floating Point Arithmetic, 1985.
  • 6
    • 0026626172 scopus 로고
    • Backpropagation simulations using limited precision calculations
    • July
    • J.L Holt and T.E Baker, "Backpropagation simulations using limited precision calculations," in Proc. Int. Joint Conf. Neural Networks (IJCNN-91), vol. 2, July 1991, pp. 121-126.
    • (1991) Proc. Int. Joint Conf. Neural Networks (IJCNN-91) , vol.2 , pp. 121-126
    • Holt, J.L.1    Baker, T.E.2
  • 7
    • 84876818190 scopus 로고    scopus 로고
    • A re-evaluation of the practicality of floating-point operations on FPGAs
    • Los Alamitos, Calif
    • Walter B. Ligon et al., "A re-evaluation of the practicality of floating-point operations on FPGAs," in Proc. IEEE Symp. FPGAs for Custom Computing Machines, Los Alamitos, Calif., 1998, pp. 206-215.
    • (1998) Proc. IEEE Symp. FPGAs for Custom Computing Machines , pp. 206-215
    • Ligon, W.B.1
  • 8
    • 2642519672 scopus 로고    scopus 로고
    • Library of parameterized hardware modules for floating-point arithmetic with an example application,
    • M.S. thesis, Dept. of Electrical and Computer Engineering, Northeastern University, Boston, Mass, June
    • Pavle Belanovic, "Library of parameterized hardware modules for floating-point arithmetic with an example application," M.S. thesis, Dept. of Electrical and Computer Engineering, Northeastern University, Boston, Mass., June 2002.
    • (2002)
    • Belanovic, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.