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Volumn 2006, Issue , 2006, Pages 165-170
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Reducing sampling clock jitter to improve SNR measurement of A/D converters in production test
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Author keywords
[No Author keywords available]
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Indexed keywords
CLOCK JITTERS;
CLOCK SIGNALS;
QUANTIZATION NOISE;
VOLTAGE CONTROLLED CRYSTAL OSCILLATOR (VCXO);
ANALOG TO DIGITAL CONVERSION;
BANDWIDTH;
COMPUTER SIMULATION;
PHASE LOCKED LOOPS;
SIGNAL TO NOISE RATIO;
VARIABLE FREQUENCY OSCILLATORS;
JITTER;
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EID: 33845427568
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ETS.2006.39 Document Type: Conference Paper |
Times cited : (8)
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References (13)
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