SALT - Structured assertion language for temporal logic

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4260 LNCS, Issue , 2006, Pages 757-775

  Bauer, Andreas ^a   Leucker, Martin ^a   Streit, Jonathan ^a  

^a TECHNICAL UNIVERSITY OF MUNICH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; FORMAL LOGIC; PROGRAM COMPILERS; REAL TIME SYSTEMS; SEMANTICS; SYNTACTICS;

CONCISE TEMPORAL SPECIFICATIONS; REACTIVE SYSTEMS; VERIFICATION TOOLS;

COMPUTER PROGRAMMING LANGUAGES;

EID: 33845265297     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11901433_41     Document Type: Article

References (25)

1. [ABKV03] R. Armoni, D. Bustan, O. Kupferman, and M. Y. Vardi. Resets vs. aborts in linear temporal logic. In International Conference on Tools and Algorithms for Construction and Analysis of Systems, pages 65-80. Springer, 2003.
2. +02] Roy Armoni, Limor Fix, Alon Flaisher, Rob Gerth, Boris Ginsburg, Tomer Kanza, Avner Landver, Sela Mador-Haim, Eli Singerman, Andreas Tiemeyer, Moshe Y. Vardi, and Yael Zbar. The ForSpec temporal logic: A new temporal property-specification language. In Tools and Algorithms for Construction and Analysis of Systems, pages 296-211, 2002.
3. +01] Ilan Beer, Shoham Ben-David, Cindy Eisner, Dana Fisman, Anna Gringauze, and Yoav Rodeh. The temporal logic Sugar. In Proceedings of the 13th International Conference on Computer Aided Verification (CAV), pages 363-367, London, UK, 2001. Springer.
4. [BGHS04] H. Barringer, A. Goldberg, K. Havelund, and K. Sen. Rule-based runtime verification. In Fifth International Conference on Verification, Model Checking and Abstract Interpretation, 2004.
5. [BKKS05] J. Botaschanjan, L. Kof, C. Kühnel, and M. Spichkova. Towards Verified Automotive Software. In ACM Press, editor, Proceedings of the 2nd International ICSE Workshop on Automotive Software. ACM, New York, May 2005.
6. [CDHR01] James Corbett, Matthew Dwyer, John Hatcliff, and Robby. Expressing checkable properties of dynamic systems: The Bandera specification language. Technical Report 04, Kansas State University, Department of Computing and Information Sciences, 2001.
7. [CGP99] Edmund M. Clarke, Orna Grumberg, and Doron A. Peled. Model Checking. The MIT Press, Cambridge, Massachusetts, 1999.
8. [CHR91] Zhou ChaoChen, Tony Hoare, and Anders P. Ravn. A calculus of durations. Information Processing Letters, 40(5):269-276, 1991.
9. [DAC99] Matthew B. Dwyer, George S. Avrunin, and James C. Corbett. Patterns in property specifications for finite-state verification. In Proceedings of the 21st International Conference on Software Engineering, 1999.
10. [DDH72] O.J. Dahl, E.W. Dijkstra, and C.A.R. Hoare. Structured Programming. Academic Press, London, 1972.
11. [D'S03] Deepak D'Souza. A logical characterisation of event clock automata. International Journal of Foundations of Computer Science (IJFCS), 14(4):625-639, August 2003.
12. [FMW05] Harry Foster, Erisch Marschner, and Yaron Wolfsthal. IEEE 1850 PSL: The next generation. In DVCon, 2005.
13. [Fri03] Garsten Fritz. Constructing Büchi automata from linear temporal logic using simulation relations for alternating Büchi automata. In Oscar H. Ibarra and Zhe Dang, editors, Implementation and Application of Automata. Eighth International Conference (CIAA), volume 2759 of Lecture Notes in Computer Science, pages 35-48, Santa Barbara, CA, USA, 2003.
14. [GHJV94] E. Gamma, R. Helm, R. Johnson, and J. Vlissides. Design Patterns: Elements of Reusable Object-Oriented Software. Addison-Wesley, 1994.
15. [G001] Paul Gastin and Denis Oddoux. Fast LTL to Büchi automata translation. In Proceedings of the 13th International Conference on Computer Aided Verification (CAV), pages 53-65, London, UK, 2001. Springer.
16. [GPSS80] Dov Gabbay, Amir Pnueli, Saharon Shelah, and Jonathan Stavi. On the temporal analysis of fairness. In Proceedings of the 7th ACM SIGPLAN-SIGACT symposium on Principles of programming languages (POPL), pages 163-173, New York, NY, USA, 1980. ACM Press.
17. [Hol97] Gerard J. Holzmann. The model checker Spin. IEEE Trans. on Software Engineering, 23:279-295, May 1997.
18. [HSSS96] Franz Huber, Bernhard Schatz, Alexander Schmidt, and Katharina Spies. AutoFocus: A tool for distributed systems specification. In Proceedings of Formal Techniques in Real-Time and Fault Tolerant Systems, pages 467-470. Springer, 1996.
19. [Kam68] Johan Anthony Willem Kamp. Tense Logic and the Theory of Linear Order. PhD thesis, University of California, Los Angeles, 1968.
20. [Mar03] Nicolas Markey. Temporal logic with past is exponentially more succinct, concurrency column. Bulletin of the EATCS, 79:122-128, 2003.
21. [McM92] K. L. McMillan. The SMV system, symbolic model checking - an approach. Technical Report CMU-CS-92-131, Carnegie Mellon University, 1992.
22. [MP95] Zohar Manna and Amir Pnueli. Temporal Verification of Reactive Systems. Springer, New York, 1995.
23. [Pnu77] Amir Pnueli. The temporal logic of programs. In Proceedings of the 18th IEEE Symposium on the Foundations of Computer Science (FOCS-77), pages 46-57, Providence, Rhode Island, October 31-November 2 1977. IEEE Computer Society Press.
24. [RS97] Jean-François Raskin and Pierre-Yves Schobbens. State clock logic: A decidable real-time logic. In Oded Maler, editor, HART, volume 1201 of Lecture Notes in Computer Science, pages 33-47. Springer, 1997.
25. [TS05] T. Tuerk and K. Schneider. From PSL to LTL: A formal validation in HOL. In Theorem Proving in Higher Order Logic (TPHOL), Lecture Notes in Computer Science, Oxford, UK, 2005. Springer.