Challenges of remote FPGA configuration for space applications

IEEE Aerospace Conference Proceedings

Volumn 2005, Issue , 2005, Pages

  Surratt, Mindy ^a   Loomis, Herschel H ^a   Ross, Alan A ^a   Duren, Russ ^b  

^a NAVAL POSTGRADUATE SCHOOL   (United States)

^b BAYLOR UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONFIGURATION FILES; FAULT TOLERANT PROCESSOR (CFTP);

BANDWIDTH; FAULT TOLERANT COMPUTER SYSTEMS; PROGRAM PROCESSORS; SPACE APPLICATIONS; SPACE RESEARCH; SPACECRAFT;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33751532411     PISSN: 1095323X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AERO.2005.1559549     Document Type: Conference Paper

References (9)

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2. C. A. Hulme, H. H. Loomis, A. A. Ross, and R. Yuan, "Configurable Fault-Tolerant Processor (CFTP) for Spacecraft Onboard Processing," 2004 IEEE Aerospace Applications Conference Proceedings, 7-12 March 2004.
3. M. Wirthlin, E. Johnson, N. Rollins, M. Caffrey, and P. Graham, "The Reliability of FPGA Circuit Designs in the Presence of Radiation Induced Configuration Upsets," 2003 IEEE Symposium on Field-Programmable Custom Computing Machines Proceedings, 9-11 April 2003.
4. D. A. Ebert, "Design and Development of a Configurable Fault Tolerant Processor (CFTP) for Space Applications," Master's Thesis, Naval Postgraduate School, Monterey, California. June 2003.
5. R. Yuan, "Triple Modular Redundancy (TMR) in a Configurable Fault Tolerant Processor (CFTP) for Space Applications," Master's Thesis, Naval Postgraduate School, Monterey, California. December 2003.
6. C. A. Hulme, "Testing and Evaluation of the Configurable Fault Tolerant Processor (CFTP) for Space-Based Applications." Master's Thesis, Naval Postgraduate School, Monterey, California. December 2003.
7. M. Gokhale, P. Graham, E. Johnson, N. Rollins, and M. Wirthlin, "Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs," 2004 International Parallel and Distributed Processing Symposium, 26-30 April 2004
8. Xilinx, Application Note 138, "Virtex FPGA Series Configuration and Readback," 5 November 2001.
9. Xilinx, Application Note 290, "Two Flows for Partial Reconfiguration: Module-based or Difference-based," 9 September 2004.