Investigation of fully- and partially-depleted self-aligned SiGeC HBTs on thin film SOI

Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference

Volumn 2005, Issue , 2005, Pages 133-136

  Avenier, Gregory ^a,b   Chevalier, Pascal ^a   Vandelle, Benoît ^a   Lenoble, Damien ^a   Saguin, Fabienne ^a   Frégonèse, Sébastien ^b   Zimmer, Thomas ^b   Chantre, Alain ^a  

^a STMICROELECTRONICS   (France)

^b UNIVERSITÉ BORDEAUX 1   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COLLECTOR DOPING; FULLY-DEPLETED TRANSISTORS; HIGH SPEED APPLICATIONS;

CMOS INTEGRATED CIRCUITS; DOPING (ADDITIVES); SEMICONDUCTING SILICON COMPOUNDS; SUBSTRATES; THIN FILMS;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 33751440051     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDER.2005.1546603     Document Type: Conference Paper

References (4)

1. J. Cai et al. Vertical SiGe-base bipolar transistors on CMOS-compatible SOI substrate. Proceedings IEEE Bipolar/BiCMOS Circuits and Technology Meeting, Toulouse, pages 215-218, 2003.
2. P. Chevalier et al. 230GHz self-aligned SiGeC HBT for 90nm BiCMOS technology. Proceedings IEEE Bipolar/BiCMOS Circuits and Technology Meeting, Montreal, pages 225-228, 2004.
3. G. Avenier et al. A self-aligned vertical HBT for thin SOI SiGeC BiCMOS. Submitted to IEEE Bipolar/BiCMOS Circuits and Technology Meeting, Santa Barbara, 2005.
4. C. Raynaud et al. Is SOI CMOS a promising technology for SoCs in high frequency range? Proceedings ECS International Symposium on SOI Technology and Devices, Quebec, 2005 (to be published).