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Volumn , Issue , 2006, Pages 33-

A quantum CAD accelerator based on Grover's algorithm for finding the minimum fixed polarity reed-muller form

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; FUNCTION EVALUATION; LOGIC CIRCUITS; QUANTUM THEORY; SWITCHING CIRCUITS;

EID: 33751056189     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISMVL.2006.8     Document Type: Conference Paper
Times cited : (8)

References (23)
  • 4
    • 33751051077 scopus 로고    scopus 로고
    • School on Quantum Computing @Yagami
    • E. Abe, School on Quantum Computing @Yagami, http://www.appi.keio.ac.jp/ Itoh_group/members/abe/qis-4.pdf
    • Abe, E.1
  • 6
    • 0030123476 scopus 로고    scopus 로고
    • Minimization of exclusive sum of products expressions for multi-output multiple-valued input, incompletely specified functions
    • April
    • N. Song, M. Perkowski, "Minimization of Exclusive Sum of Products Expressions for Multi-Output Multiple-Valued Input, Incompletely Specified Functions," IEEE Transactions on Computer Aided Design, Vol. 15, No. 4, April 1996, pp. 385-395.
    • (1996) IEEE Transactions on Computer Aided Design , vol.15 , Issue.4 , pp. 385-395
    • Song, N.1    Perkowski, M.2
  • 8
    • 0030286259 scopus 로고    scopus 로고
    • A genetic algorithm for minimization of fixed polarity reed-muller expressions
    • Rolf Drechsler, Bernd Becker, Nicole Göckel, "A Genetic Algorithm For Minimization of Fixed Polarity Reed-Muller Expressions," In IEE Proceedings Computers and Digital Techniques, Vol. 143, pp. 364-368, 1996.
    • (1996) IEE Proceedings Computers and Digital Techniques , vol.143 , pp. 364-368
    • Drechsler, R.1    Becker, B.2    Göckel, N.3
  • 11
    • 33751052195 scopus 로고    scopus 로고
    • B. Patterson, http:www.cs.iastate.edu/~patterbi/cs/quantum.fp/FinalPaper. pdf
    • Patterson, B.1
  • 14
    • 11344251915 scopus 로고    scopus 로고
    • Improving Gate-level simulation of quantum circuits
    • (quant-ph/0309060), to appear in
    • G. F. Viamontes, I. L. Markov and J. P. Hayes, "Improving Gate-Level Simulation of Quantum Circuits" (quant-ph/0309060), to appear in Quantum Information Processing, 2004
    • (2004) Quantum Information Processing
    • Viamontes, G.F.1    Markov, I.L.2    Hayes, J.P.3
  • 15
    • 0038584516 scopus 로고    scopus 로고
    • Easily testable multiple-valued dalois field sum-of-products circuits
    • U. Kalay, D. V. Hall, and M. Perkowski "Easily Testable Multiple-Valued dalois Field Sum-of-Products Circuits". Journal on Multiple Valued Logic, 2000, Vol. 5, pp. 507-528.
    • (2000) Journal on Multiple Valued Logic , vol.5 , pp. 507-528
    • Kalay, U.1    Hall, D.V.2    Perkowski, M.3
  • 16
    • 0033742567 scopus 로고    scopus 로고
    • A minimal universal test set for self-test of EXOR-sum-of-products circuits
    • March
    • U. Kalay, M. Perkowski, D. Hall, "A Minimal Universal Test Set for Self-Test of EXOR-Sum-Of-Products Circuits," IEEE Tr. on Computers, March 2000, Vol. 49, pp. 267-276.
    • (2000) IEEE Tr. on Computers , vol.49 , pp. 267-276
    • Kalay, U.1    Perkowski, M.2    Hall, D.3
  • 17
    • 9144245836 scopus 로고
    • A class of multiple error correcting codes and their decoding scheme
    • S. Reed, "A class of multiple error correcting codes and their decoding scheme," IRE Trans. Inf. Th.,Vol. PGIT-4, 1954, 38-39.
    • (1954) IRE Trans. Inf. Th. , vol.PGIT-4 , pp. 38-39
    • Reed, S.1
  • 18
    • 0001854367 scopus 로고
    • O tekhnyke vychyslenyi predlozhenyi v symbolytscheskoi logykye
    • in Russian
    • I. Zhegalkin, "O tekhnyke vychyslenyi predlozhenyi v symbolytscheskoi logykye," Math. Sb., Vol. 34, 1927, 9-28, (in Russian).
    • (1927) Math. Sb. , vol.34 , pp. 9-28
    • Zhegalkin, I.1
  • 19
    • 0027593749 scopus 로고
    • EXMIN2: A simplification algorithm for exclusive-OR-Sum-of-products expressions for multiple-valued input two-valued output functions
    • May
    • T. Sasao, "EXMIN2: A simplification algorithm for exclusive-or-sum-of-products expressions for multiple-valued input two-valued output functions," IEEE Trans.on Computer-Aided Design, vol. 12, No. 5, May 1993, pp. 621-632.
    • (1993) IEEE Trans.on Computer-aided Design , vol.12 , Issue.5 , pp. 621-632
    • Sasao, T.1
  • 21
    • 84968470212 scopus 로고
    • An algorithm for the machine calculation of complex Fourier series
    • J. W. Cooley, and J. W. Tukey, "An algorithm for the machine calculation of complex Fourier series. Math. Computation, Vol. 19:297-301, 1965.
    • (1965) Math. Computation , vol.19 , pp. 297-301
    • Cooley, J.W.1    Tukey, J.W.2
  • 22
    • 25444490372 scopus 로고    scopus 로고
    • Ternary fixed polarity linear kronecker transforms and their comparison with ternary reed-muller transform
    • Ch. Fu, and B.J. Falkowski, "Ternary Fixed Polarity Linear Kronecker Transforms and their Comparison with Ternary Reed-Muller Transform," Journal of Circuits, Systems, and Computers, Vol. 14, No. 4 (2005) pp. 721-733.
    • (2005) Journal of Circuits, Systems, and Computers , vol.14 , Issue.4 , pp. 721-733
    • Fu, Ch.1    Falkowski, B.J.2
  • 23
    • 0023293750 scopus 로고
    • A high-speed multiplier using a redundant binary adder tree
    • Feb.
    • Y. Harata, et.al, "A High-Speed Multiplier Using a Redundant Binary Adder Tree,"IEEE J. Solid-State Circuits, vol. 22, pp. 28-34, Feb. 1987.
    • (1987) IEEE J. Solid-state Circuits , vol.22 , pp. 28-34
    • Harata, Y.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.