Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit: Design and chip characterization

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 2200-2203

  Fayomi, Christian Jesus B ^a   Roberts, Gordon W ^b   Sawan, Mohamad ^c  

^a UNIVERSITÉ DU QUÉBEC À MONTRÉAL   (Canada)

^b MCGILL UNIVERSITY   (Canada)

^c ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CMOS SWITCHES; BOOTSTRAPPED SWITCHES; CIRCUIT OPERATION; CLOCK VOLTAGE; CMOS ANALOG; DIGITAL CMOS; LOW STRESS; LOW-VOLTAGE; SAMPLE-AND-HOLD; SAMPLE-AND-HOLD CIRCUITS; SUPPLY VOLTAGES;

CIRCUIT THEORY;

EID: 33750552216     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465058     Document Type: Conference Paper

References (6)

1. B. Razavi, Design of Analog CMOS Integrated Circuit, McGraw-Hill, 2000.
2. L. Dai and R. Harjani, "CMOS Switched-Op-Amp-Based Sample-and-Hold Circuit", IEEE J. Solid-State Circuits, Vol. SC-35, No.1, pp. 109-113, January 2000.
3. J. Steensgaard, "Bootstrapped Low-Voltage Analog Switches", IEEE Proc. Int. Symp. Circuits and Systems Vol.2, pp. II 29- II 32, 1999.
4. Semiconductor Industry Association (SIA), "The International Technology Roadmap for Semiconductors", Table 5, pp. 5, 1998 available online at http://notes.sematech.org/ntrs/Rdmpmem.nsf.
5. C. J. B. Fayomi, M. Sawan, and G. W. Roberts, "Reliable Circuit Techniques for Low-Voltage Analog Design in Deep Submicron Standard CMOS: A Tutorial," Analog Integrated Circuits and Signal Processing, Vol. 39, No.1, pp. 21-38, April 2004.
6. th Midwest Symposium on Circuits and Systems, Hiroshima (Japan), Vol. 3, pp. 315-318, July 2004.