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Volumn 35, Issue 1, 2000, Pages 109-113

CMOS switched-op-amp-based sample-and-hold circuit

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CAPACITORS; ELECTRIC NETWORK SYNTHESIS; ELECTRIC NETWORK TOPOLOGY; HARMONIC ANALYSIS; MOS DEVICES; OPERATIONAL AMPLIFIERS; SWITCHING CIRCUITS;

EID: 0033909091     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.818927     Document Type: Article
Times cited : (69)

References (11)
  • 1
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    • All-MOS charge redistribution analog-to-digital conversion techniques
    • Dec.
    • U. L. McCreary and P. R. Gray, "All-MOS charge redistribution analog-to-digital conversion techniques," IEEE J. Solid-State Circuits, vol. SC-10, pp. 371-379, Dec. 1975.
    • (1975) IEEE J. Solid-state Circuits , vol.SC-10 , pp. 371-379
    • McCreary, U.L.1    Gray, P.R.2
  • 2
    • 0022941770 scopus 로고
    • Single versus complementary switches: A discussion of clock feedthrough in sc circuits
    • Delft, the Netherlands, Sept.
    • P. Van Peteghem and W. Sanaen, "Single versus complementary switches: A discussion of clock feedthrough in SC circuits," in Proc. 12th Eur. Solid-State Circuits Conf. (ESSCIRC '86), Delft, the Netherlands, Sept. 1986, pp. 16-18.
    • (1986) Proc. 12th Eur. Solid-state Circuits Conf. (ESSCIRC '86) , pp. 16-18
    • Van Peteghem, P.1    Sanaen, W.2
  • 3
    • 0024719912 scopus 로고
    • Dummy transistor compensation of analog MOS switches
    • Aug.
    • C. Eichenberger and W. Guggenbühl, "Dummy transistor compensation of analog MOS switches," IEEE J. Solid-State Circuits, vol. 24, pp. 1143-1146, Aug. 1989.
    • (1989) IEEE J. Solid-state Circuits , vol.24 , pp. 1143-1146
    • Eichenberger, C.1    Guggenbühl, W.2
  • 4
    • 0024940538 scopus 로고
    • A 10-bit video BiCMOS track-and-hold amplifier
    • Dec.
    • M. Nayebi and B. A. Wooley, "A 10-bit video BiCMOS track-and-hold amplifier," IEEE J. Solid-State Circuits, vol. 24, pp. 1507-1516, Dec. 1989.
    • (1989) IEEE J. Solid-state Circuits , vol.24 , pp. 1507-1516
    • Nayebi, M.1    Wooley, B.A.2
  • 5
    • 0026138527 scopus 로고
    • A high-speed sample-and-hold technique using a miller hold capacitance
    • Apr.
    • P. J. Lim and B. A. Wooley, "A high-speed sample-and-hold technique using a miller hold capacitance," IEEE J. Solid-State Circuits, vol. 26, pp. 643-651, Apr. 1991.
    • (1991) IEEE J. Solid-state Circuits , vol.26 , pp. 643-651
    • Lim, P.J.1    Wooley, B.A.2
  • 6
    • 0029358631 scopus 로고
    • A high-frequency track-and-hold stage with offset and gain compensation
    • Aug.
    • G. C. Temes, Y. Huang, and P. F. Ferguson Jr., "A high-frequency track-and-hold stage with offset and gain compensation." IEEE Trans. Circuits Syst. II, vol. 42, pp. 559-560, Aug. 1995.
    • (1995) IEEE Trans. Circuits Syst. II , vol.42 , pp. 559-560
    • Temes, G.C.1    Huang, Y.2    Ferguson P.F., Jr.3
  • 8
    • 0023330760 scopus 로고
    • Measurement and analysis of charge injection in MOS switches
    • Apr.
    • J. H. Shieh, M. Patil, and B. J. Sheu, "Measurement and analysis of charge injection in MOS switches," IEEE J. Solid-State Circuits, vol. SC-22, pp. 277-281, Apr. 1986.
    • (1986) IEEE J. Solid-state Circuits , vol.SC-22 , pp. 277-281
    • Shieh, J.H.1    Patil, M.2    Sheu, B.J.3
  • 11
    • 0028483735 scopus 로고
    • Switched-opamp: An approach to realize full CMOS switched-capacitor circuits at very low power supply voltages
    • Aug.
    • J. Crols and M. Steyaert, "Switched-opamp: An approach to realize full CMOS switched-capacitor circuits at very low power supply voltages," IEEE J. Solid-State Circuits, vol. 29, no. 8, Aug. 1994.
    • (1994) IEEE J. Solid-state Circuits , vol.29 , Issue.8
    • Crols, J.1    Steyaert, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.