-
2
-
-
0034268943
-
A Portabe Programming Interface for Performance Evaluation on Modern Processors
-
Browne, S., Dongarra, J., Garner, N., Ho, G., and Mucci, P. 2000. A Portabe Programming Interface for Performance Evaluation on Modern Processors. International Journal of High Performance Computing Applications 14 (4): 189-204.
-
(2000)
International Journal of High Performance Computing Applications
, vol.14
, Issue.4
, pp. 189-204
-
-
Browne, S.1
Dongarra, J.2
Garner, N.3
Ho, G.4
Mucci, P.5
-
5
-
-
0003278283
-
The Microarchitecture of the Pentium 4 Processor
-
Hinton, G., Sager, D., Upton, M., Boggs, D., Carmean, D., Kyker, A., and Roussel, P. 2001. The Microarchitecture of the Pentium 4 Processor. Intel Technology Journal 5 (1). http://www.intel.com/technology/itj/ q12001/pdf/art2.pdf.
-
(2001)
Intel Technology Journal
, vol.5
, Issue.1
-
-
Hinton, G.1
Sager, D.2
Upton, M.3
Boggs, D.4
Carmean, D.5
Kyker, A.6
Roussel, P.7
-
6
-
-
33646167245
-
-
Intel Corporation (a)
-
Intel Corporation (a). Intel Pentium 4 Processor Manuals. http://developer.intel.com/design/Pentium4/manuals/.
-
Intel Pentium 4 Processor Manuals
-
-
-
7
-
-
19644399541
-
-
Intel Corporation (b)
-
Intel Corporation (b). VTune Performance Analyzers. http://www.intel.com/ software/products/vtune/index.htm.
-
VTune Performance Analyzers
-
-
-
8
-
-
0031199614
-
Converting Thread-Level Parallelism to Instruction-Level Parallelism via Simultaneous Multithreading
-
Lo, J. L., Eggers, S. J., Emer, J. S., Levy, H. M., Stamm, R. L., and Tullsen, D. M. 1997. Converting Thread-Level Parallelism to Instruction-Level Parallelism via Simultaneous Multithreading. ACM Transactions on Computer Systems 15 (3): 322-354. http://www.cs.washington.edu/research/smt/papers/tlp2ilp.final.pdf.
-
(1997)
ACM Transactions on Computer Systems
, vol.15
, Issue.3
, pp. 322-354
-
-
Lo, J.L.1
Eggers, S.J.2
Emer, J.S.3
Levy, H.M.4
Stamm, R.L.5
Tullsen, D.M.6
-
9
-
-
0001087280
-
Hyper-Threading Technology Architecture and Microarchitecture
-
Marr, D., Binns, F., Hill, D., Hinton, G., Koufaty, D., Miller, J., and Upton, M. 2002. Hyper-Threading Technology Architecture and Microarchitecture. Intel Technology Journal 6 (1). http://developer.intel.com/technology/itj/2002/volume06issue01/ art01hyper/vol6iss1art01.pdf.
-
(2002)
Intel Technology Journal
, vol.6
, Issue.1
-
-
Marr, D.1
Binns, F.2
Hill, D.3
Hinton, G.4
Koufaty, D.5
Miller, J.6
Upton, M.7
-
10
-
-
84871391589
-
-
XML::Simple. http://search.cpan.org/dist/XML-Simple/lib/XML/Simple.pm
-
McLean, G. XML::Simple. Comprehensive Perl Archive Network, http://www.cpan.org/. http://search.cpan.org/dist/XML-Simple/lib/XML/ Simple.pm.
-
Comprehensive Perl Archive Network
-
-
McLean, G.1
-
12
-
-
0036652569
-
Pentium 4 Performance Monitoring Features
-
Sprunt, B. 2002a. Pentium 4 Performance Monitoring Features. IEEE Micro Magazine 22 (4): 72-82.
-
(2002)
IEEE Micro Magazine
, vol.22
, Issue.4
, pp. 72-82
-
-
Sprunt, B.1
-
13
-
-
0036653890
-
The Basics of Performance Monitoring Hardware
-
Sprunt, B. 2002b. The Basics of Performance Monitoring Hardware. IEEE Micro Magazine 22 (4): 64-71.
-
(2002)
IEEE Micro Magazine
, vol.22
, Issue.4
, pp. 64-71
-
-
Sprunt, B.1
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