Spatial and energetic distribution of border traps in the dual-layer HfO2/Si O2 high- k gate stack by low-frequency capacitance-voltage measurement

Applied Physics Letters

Volumn 89, Issue 16, 2006, Pages

  Wu, Wei Hao ^a   Tsui, Bing Yue ^a   Chen, Mao Chieh ^a   Hou, Yong Tian ^b   Jin, Yin ^b   Tao, Hun Jan ^b   Chen, Shih Chang ^b   Liang, Mong Song ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; DIELECTRIC DEVICES; HAFNIUM COMPOUNDS; MOS DEVICES; THRESHOLD VOLTAGE;

BORDER TRAPS; ELASTIC TUNNELING MODEL; GATE DIELECTRICS; TRANSIENT CHARGING;

FIELD EFFECT TRANSISTORS;

EID: 33750153685     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.2364064     Document Type: Article

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