Unified DA-based parallel architecture for computing the DCT and the DST

2005 Fifth International Conference on Information, Communications and Signal Processing

Volumn 2005, Issue , 2005, Pages 1278-1282

  Meher, Pramod Kumar ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

DCT; Digital signal processing; Distributed arithmetic; DST; VLSI architecture

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; DIGITAL SIGNAL PROCESSING; DISCRETE COSINE TRANSFORMS; VLSI CIRCUITS;

DISTRIBUTED ARITHMETIC; DST; VLSI ARCHITECTURE;

PARALLEL PROCESSING SYSTEMS;

EID: 33749845898     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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