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Volumn 2006, Issue , 2006, Pages 109-113

An optimized direct digital frequency synthesizer based on even fourth order polynomial interpolation

Author keywords

Direct Digital Frequency Synthesizer; Polynomial Interpolation; Spurious Harmonic Analysis

Indexed keywords

CLOCK FREQUENCY; DIRECT DIGITAL FREQUENCY SYNTHESIZER (DDFS); POLYNOMIAL INTERPOLATION; SPURIOUS HARMONIC ANALYSIS;

EID: 33749645434     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (11)
  • 4
    • 13244273508 scopus 로고    scopus 로고
    • Phase to sinusoid amplitude conversion techniques for direct digital frequency synthesis
    • Dec.
    • J.M.P. Langlois and D. Al-Khalili, "Phase to Sinusoid Amplitude Conversion Techniques for Direct Digital Frequency Synthesis", IEE Proc.-Circuit devices Syst., Vol. 151, No. 6, Dec. 2004.
    • (2004) IEE Proc.-Circuit Devices Syst. , vol.151 , Issue.6
    • Langlois, J.M.P.1    Al-Khalili, D.2
  • 5
    • 4544238866 scopus 로고    scopus 로고
    • A 13-Bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula
    • Sep.
    • C.C. Wang, Y.L. Tseng, H.C. She, C.C. Li, and R. Hu, "A 13-Bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula," IEEE Trans. VLSI systems, Vol. 12, No.9, pp. 895-900 Sep. 2004.
    • (2004) IEEE Trans. VLSI Systems , vol.12 , Issue.9 , pp. 895-900
    • Wang, C.C.1    Tseng, Y.L.2    She, H.C.3    Li, C.C.4    Hu, R.5
  • 6
    • 27844496966 scopus 로고    scopus 로고
    • Comments on "A 13-Bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula"
    • Sept.
    • A. Ashrafi, and R. Adhami, "Comments on "A 13-Bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula"," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 13, No. 9, pp. 1096-1098, Sept. 2005.
    • (2005) IEEE Transactions on Very Large Scale Integration (VLSI) Systems , vol.13 , Issue.9 , pp. 1096-1098
    • Ashrafi, A.1    Adhami, R.2
  • 9
    • 0032495361 scopus 로고    scopus 로고
    • VLSI implementation of 350MHz 0.35μ.m 8bit merger squarer
    • Jan.
    • R.K. Kolagotla, W.R. Griesbach, and H.R. Srinivas, "VLSI Implementation of 350MHz 0.35μ.m 8bit Merger Squarer", Electronics Letters, Vol. 34, No.1, Jan. 1998.
    • (1998) Electronics Letters , vol.34 , Issue.1
    • Kolagotla, R.K.1    Griesbach, W.R.2    Srinivas, H.R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.