On the Phase Coupling Problem between Data Memory Layout Generation and Address Pointer Assignment

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3199, Issue , 2004, Pages 152-166

  Wess, Bernhard ^a   Zeitlhofer, Thomas ^a  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL OPTIMIZATION; COMPUTATIONAL COMPLEXITY; DIGITAL SIGNAL PROCESSORS; EMBEDDED SYSTEMS; HEURISTIC METHODS; SIGNAL PROCESSING; SIMULATED ANNEALING;

ADDRESS GENERATION UNITS; BENCHMARK SUITES; HEURISTIC TECHNIQUES; LAYOUT GENERATIONS; PHASE COUPLING; PROGRAM VARIABLES; QUADRATIC ASSIGNMENT PROBLEMS; SOLUTION SPACE;

OPTIMIZATION;

EID: 33749557603     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30113-4_12     Document Type: Article

References (12)

1. B. Wess and M. Gotschlich, "Optimal DSP memory layout generation as a quadratic assignment problem," in Proc. IEEE Int. Symp. on Circuits and Sys~ terns, Hong Kong, June 1997, vol. 3, pp. 1712-1715.
2. S. Liao, S. Devadas, K. Keutzer, S. Tjiang, and A. Wang, "Storage assignment to decrease code size," in Proc. ACM Conf. on Programming Language Design and Implementation, June 1995, pp. 186-195.
3. D. Ottoni, G. Ottoni, G. Araujo, and R. Leupers, "Improving offset assignment through simultaneous variable coalescing," in Proc. 7th Int. Workshop on Software and Compilers for Embedded Systems, Vienna, September 2003, pp. 285-297.
4. C. H. Papadimitriou, "The NP-compIeteness of the bandwidth minimization problem," Computing, vol. 16, pp. 263-270, 1976.
5. J. B. Saxe, "Dynamic-programming algorithms for recognizing small-bandwidth graphs in polynomial time," SIAM J. Alg. Disc. Meth., vol. 1, no. 4, pp. 363-369, December 1980.
6. M. R. Garey, R. L. Graham, D. S. Johnson, and D. E. Knuth, "Complexity results for bandwidth minimization," SIAM J. Appl. Math., vol. 34, no. 3, pp. 477-495, May 1978.
7. B. Wess and M. Gotschlich, "Constructing memory layouts for address generation units supporting offset 2 access," in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, Munich, April 1997, vol. 1, pp. 683-686.
8. B. Wess, "Minimization of data address computation overhead in DSP programs," Kluwer Design Automation for Embedded Systems, vol. 4, pp. 167-185, March 1999.
9. R. Leupers and P. Marwedel, "Algorithms for address assignment in DSP code generation," in Proc. IEEE Int. Conf. on Computer-Aided Design, San Jose, November 1996, pp. 109-112.
10. M. C. Golumbic, Algorithmic Graph Theory and Perfect Graphs, Academic Press, 1980.
11. B. Wess and T. Zeitlhofer, "Optimum address pointer assignment for digital signal processors," to appear in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, 2004.
12. R. Leupers, "Offset assignment showdown: Evaluation of DSP address code optimization algorithms," in 12th International Conference on Compiler Construction (CC), Warsaw (Poland), April 2003, Springer Lecture Notes on Computer Science, LNCS 2622, http://www.address-code-optimization.org.