Statistical analysis of the time-delay digital tanlock loop in the presence of Gaussian noise

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 4, Issue , 2001, Pages 21-24

  Hussain, Zahir M ^a   Boashash, Boualein ^a  

^a QUEENSLAND UNIVERSITY OF TECHNOLOGY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

ADDITIVE GAUSSIAN NOISE; DIGITAL TANLOCK LOOP; EXPECTED VALUES; PHASE ERROR; PHASE ERROR DETECTOR; STEADY-STATE VALUES; TIME-DELAY DIGITAL TANLOCK LOOPS;

GAUSSIAN NOISE (ELECTRONIC); TIME DELAY;

DELAY CIRCUITS;

EID: 33749408266     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.922158     Document Type: Conference Paper

References (6)

1. G. Hsieh and C. Hung. "Phase-locked loop techniques-A survey." IEEE Transactions on Industrial Electronics, vol. 43, no. 6, pp. 609-615, Dec. 1996.
2. J. C. Lee and C. K. Un. "Performance analysis of digital tanlock loop." IEEE Transactions on Communications, vol. COM-30. no. 10. pp. 2398-2411. Oct. 1982.
3. Z. M. Hussain. B. Boashash and S. R. Al-Araji. "A time-delay digital tanlock loop." Pwceedings of the Fifth International Symposium on Signal Pmcessing and its Applications (1SSPA'99), vol. 1. pp. 391-394. Brisbane. Queensland. Australia. 22-25 Aug. 1999. (http://www.sprc.qut.edu.au/ publications/1999/index.html)
4. Z. M. Hussain. B. Boashash. M. Hassan-AIi and S. R. Al-Araji. "A time-delay digital tanlock loop." Submitted to the IEEE Transactions on Signal Processing. Jan. 2000. revised version Jul. 2000.
5. S. L. Hahn. Hilbert Transfonns in Signal Processing. Artech House. 1996.
6. S.M.Kay. Modem Spectral Estimation : Tlieorv and Application. Prentice-Hall. New Jersey. 1988.