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Volumn 2006, Issue , 2006, Pages 156-163

Energy-efficient scheme for multiprocessor-based router linecards

Author keywords

Dynamic voltage scaling; Energy consumption; Linecards; Multiprocessors; Routers

Indexed keywords

DYNAMIC VOLTAGE SCALING (DVS); ENERGY EFFICIENT OPERATIONS; MULTIPROCESSOR BASED LINECARDS;

EID: 33749388963     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SAINT.2006.29     Document Type: Conference Paper
Times cited : (39)

References (12)
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    • Burd, T.1    Brodersen, R.2
  • 9
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    • A dynamic voltage scaled microprocessor system
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    • T. Burd et al., "A Dynamic Voltage Scaled Microprocessor System," IEEE J. Solid-State Circuits, vol. 35, no. 12, Nov. 2000. pp. 1571-1580.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , Issue.12 , pp. 1571-1580
    • Burd, T.1
  • 10
    • 51849103562 scopus 로고    scopus 로고
    • National Laboratory for Applied Network Research (NLANR), Special Traces Archive, URL - http://pma.nlanr.net/Special.
    • Special Traces Archive
  • 12
    • 4444374513 scopus 로고    scopus 로고
    • Theoretical and practical limits of dynamic voltage scaling
    • June
    • B. Zhai et al., "Theoretical and Practical Limits of Dynamic Voltage Scaling," IEEE/ACM Design Automation Conf. (DAC '04), June 2004, pp. 868-873.
    • (2004) IEEE/ACM Design Automation Conf. (DAC '04) , pp. 868-873
    • Zhai, B.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.