Voltage scheduling problem for dynamically variable voltage processors

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 1998, Pages

  Ishihara, Tohru ^a   Yasuura, Hiroto ^a  

^a KYUSHU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGER PROGRAMMING; LINEAR PROGRAMMING; MATHEMATICAL MODELS; PROBLEM SOLVING;

CORE PROCESSORS; POWER DELAY; VOLTAGE SCHEDULING;

DIGITAL INTEGRATED CIRCUITS;

EID: 0031625463     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)