New CAD framework extends simulation of dynamically reconfigurable logic

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1482, Issue , 1998, Pages 1-8

  Robinson, David ^a   McGregor, Gordon ^a   Lysaght, Patrick ^a  

^a UNIVERSITY OF STRATHCLYDE   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; COMPUTER AIDED DESIGN; STRUCTURAL DESIGN;

DESIGN FLOWS; DESIGN FRAMEWORKS; DESIGN METHOD; DESIGN PRACTICE; DYNAMIC CIRCUITS; DYNAMICALLY RECONFIGURABLE LOGIC; DYNAMICALLY RECONFIGURABLE SYSTEMS; RECONFIGURABLE LOGIC;

RECONFIGURABLE HARDWARE;

EID: 84956852352     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0055227     Document Type: Conference Paper

References (10)

1. Lysaght, P., Stockwood, J.: A Simulation Tool for Dynamically Reconfigurable Field Programmable Gate Arrays. In: IEEE Transactions on VLSI Systems, Sept 1996
2. cGregor, G., Lysaght, P.: Extending Dynamic Circuit Switching to Meet the Challenges of New FPGA Architectures. In: Field Programmable Logic and Applications, pp 31-40, Luk, W., Cheung, P., & Glesner, M. (Eds) 1997
3. Kwiat, K., Debany, W.: Reconfigurable Logic Modelling. Integrated System Design, December 1996 (www. isdmag. com)
4. M'Gregor, G., Robinson, D., Lysaght, P.: Hardware/Software Co-design Environment for Reconfigurable Logic Systems.
5. Lysaght, P.: Towards an Expert System for a priori Estimation of Reconfiguration Latency in Dynamically Reconfigurable Logic. In: Field Programmable Logic and Applications, pp 183-192, Luk, W., Cheung, P., & Glesner, M. (Eds) 1997
6. Ohm, S.Y., Kurdahi, F.J., Dutt, N., Xu, M.: A Comprehensive Estimation Technique for High-Level Synthesis. In: Proceeding of 8th International Symposium on System Synthesis, 1995.
7. Xu, M., Kurdahi, F.: ChipEst-FPGA: A Tool for Chip Level Area and Timing Estimation of Lookup Table Based FPGAs for High Level Applications. In: Proceeding of Asia and South Pacific Design Automation Conference, 1997.
8. Nemani, M., Najm, F.: High-Level Area Prediction for Power Estimation. Custom Integrated Circuits Conference, 1997
9. De Micheli, G.: Synthesis and Optimization of Digital Circuits, pp155-158, McGraw Hill, 1994
10. Hadley, J.D., Hutchings, B.L.: Design Methodologies for Partially Reconfigured Systems. In: Peter Athanas and Kenneth L. Pocek, editors. Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines, pages 78-84, Los Alamitos, California, April 1995. IEEE Computer Society, IEEE Computer Society Press.