A reconfigurable VLSI learning array

Proceedings of ESSCIRC 2005: 31st European Solid-State Circuits Conference

Volumn , Issue , 2005, Pages 117-120

  Bridges, Seth ^a   Figueroa, Miguel ^b   Hsu, David ^c   Diorio, Chris ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

^b UNIVERSITY OF CONCEPCIÓN   (Chile)

^c Hamlet Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG COMPUTERS; COMPUTER ARCHITECTURE; DIGITAL INTEGRATED CIRCUITS; MATHEMATICAL MODELS; NEURAL NETWORKS; PARALLEL PROCESSING SYSTEMS; SOFTWARE PROTOTYPING;

COARSE GRAINED RECONFIGURABILITY; COMPUTATIONAL DENSITY; LEARNING ARRAYS;

VLSI CIRCUITS;

EID: 33749183237     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIR.2005.1541573     Document Type: Conference Paper

References (8)

1. Seth Bridges, Miguel Figueroa, David Hsu, and Chris Diorio. Field-Programmable Learning Arrays. In S. Thrun S. Becker and K. Obermayer, editors, Advances in Neural Information Processing Systems 15, pages 1155-1162. MIT Press, Cambridge, MA, 2003.
2. Chris Diorio, David Hsu, and Miguel Figueroa. Adaptive CMOS: from Biological Inspiration to Systems-on-a-Chip. Proceedings of the IEEE, pages 345-357, 2002.
3. Miguel Figueroa, Seth Bridges, and Chris Diorio. On-Chip Compensation of Device-Mismatch Effects in Analog VLSI Neural Networks. In Lawrence K. Saul, Yair Weiss, and Léon Bottou, editors, Advances in Neural Information Processing Systems 17, pages 441-448. MIT Press, Cambridge, MA, 2005.
4. 2, Journal of Applied Physics, pages 278-283, 1969.
5. C.A. Looby and C. Lyden. Op-amp Based CMOS Field-Programmable Analogue Array. In Circuits, Devices and Systems, IEE Proceedings, volume 147, pages 93-99, April 2000.
6. S. Satyanarayana, Y. Tsividis, and H. Graf. A Reconfigurable VLSI Neural Network. IEEE Journal of Solid-State Circuits, 27(1), January 1992.
7. E. Takeda, C. Yang, and A. Miura-Hamada. Hot Carrier Effects in MOS Devices. Academic Press, 1995.
8. Steven S. Watkins and Paul M. Chau. A Radial Basis Function Neurocomputer Implemented with Analog VLSI Circuits. In International Joint Conference on Neural Networks, pages 607-612, June 1992.