A new integrated charge pump architecture using dynamic biasing of pass transistors

Proceedings of ESSCIRC 2005: 31st European Solid-State Circuits Conference

Volumn , Issue , 2005, Pages 85-88

  Mensi, Luca ^a   Colalongo, Luigi ^a   Richelli, Anna ^a   Kovács Vajna, Zsolt Miklós ^a  

^a UNIVERSITY OF BRESCIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CHARGE; ELECTRIC LOSSES; GATES (TRANSISTOR); TRANSISTORS; VOLTAGE CONTROL;

CHARGE PUMP; CMOS TECHNOLOGY; PMOS PASS TRANSISTORS; VOLTAGE DROP;

MOS DEVICES;

EID: 33749168665     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIR.2005.1541564     Document Type: Conference Paper

References (5)

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2. Gaetano Palumbo, Domenico Pappalardo, and Maurizio Gaibotti. Charge pump citcuits: Power-consumption optimization. IEEE Transaction on Circuits and Systems-I: Fundamental Theory and Applications, 49(11): 1535-1542, November 2002.
3. Roberto Pelliconi, David iezzi, Andrea Baroni, Marco Pasotti, and Pier Luigi Rolandi. Power efficient charge pump in deep submicron standard cmos technology. IEEE Journal of Solid-State Circuits, 38(6):1068-1071, June 2003.
4. Jongshin Shin, In-Young Chung, Young June Park, and Hong Shick Min. A new charge pump without degradation in threshold voltage due to body effect IEEE Journal of Solid-State Circuits, 35(8):1227-1230, August 2000.
5. Jieh-Tsorng Wu and Kuen-Long Chang. Mos charge pump for low-voltage operation IEEE Journal of Solid-State Circuits, 33(4): 592-597, April 1998.