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Volumn , Issue , 2006, Pages 431-434

The 3D multiplexer data registration architecture for high performance inkjet printhead

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; DATA REDUCTION; ORIFICES; PRINTING;

EID: 33749161258     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (1)

References (8)
  • 2
    • 0031683832 scopus 로고    scopus 로고
    • Progress and trends in ink-jet printing technology, part 2
    • Le Technologies, Inc., Beaverton, Oregon, January/February
    • Hue P. Le*, Le Technologies, Inc., Beaverton, Oregon, "Progress and Trends in Ink-jet Printing Technology, Part 2", Journal of Imaging Science and Technology VOL. 42, Number 1, pp.49-62 January/February 1998
    • (1998) Journal of Imaging Science and Technology , vol.42 , Issue.1 , pp. 49-62
    • Le, H.P.1
  • 3
    • 16244364399 scopus 로고    scopus 로고
    • A high-voltage output driver in a 2.5-V 0.25-um CMOS technology
    • MARCH
    • Bert Serneels, Tim Piessens, Michiel Steyaert, and Wim Dehaene, "A High-Voltage Output Driver in a 2.5-V 0.25-um CMOS Technology", IEEE JOURNAL OF SOLID-STATE CIRCUIT, VOL. 40, NO.3, pp. 576-583, MARCH 2005.
    • (2005) IEEE Journal of Solid-state Circuit , vol.40 , Issue.3 , pp. 576-583
    • Serneels, B.1    Piessens, T.2    Steyaert, M.3    Dehaene, W.4
  • 5
    • 0005118009 scopus 로고    scopus 로고
    • A high speed 3.3 V IO buffer with 1.9 V tolerant CMOS process
    • G. Singh, "A high speed 3.3 V IO buffer with 1.9 V tolerant CMOS process," in Proc. Eur. Solid-State Circuits Conf., 1998, pp. 128-131.
    • (1998) Proc. Eur. Solid-state Circuits Conf. , pp. 128-131
    • Singh, G.1
  • 7
    • 0035274598 scopus 로고    scopus 로고
    • 5.5 V I/O in a 2.5 V in a 0.25um CMOS technology
    • Mar.
    • A.-J. Annema, G. Geelen, and P. de Jong, "5.5 V I/O in a 2.5 V in a 0.25um CMOS technology," IEEE J. Solid-State Circuits, vol. 36, no. 3, pp.528-538. Mar. 2001.
    • (2001) IEEE J. Solid-state Circuits , vol.36 , Issue.3 , pp. 528-538
    • Annema, A.-J.1    Geelen, G.2    De Jong, P.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.