-
1
-
-
33749018925
-
FPGAs: Edited proceedings of the international workshop on field programmable logic and applications
-
Moore, W., Luk, W., eds.: Moore, W., Luk, W., eds.
-
Moore, W., Luk, W., eds.: FPGAs: Edited Proceedings of the International Workshop on Field Programmable Logic and Applications. In Moore, W., Luk, W., eds.: FPGAs: Edited Proceedings of the International Workshop on Field Programmable Logic and Applications. (1991)
-
(1991)
FPGAs: Edited Proceedings of the International Workshop on Field Programmable Logic and Applications
-
-
-
2
-
-
33749032503
-
-
Actel Corporation: http://www.electronicstalk.com/news/act/act196.html. (2005)
-
(2005)
-
-
-
3
-
-
33749038998
-
FPGAs in space: Programmable logic in orbit
-
Last accessed: May 16, 2005
-
Morris, K.: FPGAs in Space: Programmable Logic in Orbit. FPGA and Programmable Logic Journal (2004) http://www.fpgajournal.com/articles/ 20040803_space.htm. Last accessed: May 16, 2005.
-
(2004)
FPGA and Programmable Logic Journal
-
-
Morris, K.1
-
6
-
-
33749008600
-
-
IEEE: IEEE Std. 1364-1995: Based on the Verilog(TM) Hardware Description Language
-
IEEE: IEEE Std. 1364-1995: IEEE Standard Description Language. (1995) Based on the Verilog(TM) Hardware Description Language.
-
(1995)
IEEE Standard Description Language
-
-
-
8
-
-
0003272495
-
The foundations of Esterel
-
Plotkin, G., Stirling, C., Tofte, M., eds.: Foundations of Computing. MIT Press
-
Berry, G.: The foundations of Esterel. In Plotkin, G., Stirling, C., Tofte, M., eds.: Proof, Language and Interaction: Essays in Honour of Robin Milner. Foundations of Computing. MIT Press (2000)
-
(2000)
Proof, Language and Interaction: Essays in Honour of Robin Milner
-
-
Berry, G.1
-
12
-
-
0004239019
-
How to program in Handel
-
Oxford University Computing Laboratory
-
Page, I., Spivey, M.: How to program in Handel. Technical report, Oxford University Computing Laboratory (1993)
-
(1993)
Technical Report
-
-
Page, I.1
Spivey, M.2
-
13
-
-
0001933470
-
Circuit design in Ruby
-
Staunstrup, J., ed.: North-Holland
-
Jones, G., Sheeran, M.: Circuit design in Ruby. In Staunstrup, J., ed.: Formal Methods for VLSI Design, North-Holland (1990) 13-70
-
(1990)
Formal Methods for VLSI Design
, pp. 13-70
-
-
Jones, G.1
Sheeran, M.2
-
17
-
-
33748992394
-
ANSI C to behavioural VHDL translator, Ada to behavioural VHDL translator
-
Sheraga, R.J.: ANSI C to behavioural VHDL translator, Ada to behavioural VHDL translator. The RASSP Digest 3 (1996)
-
(1996)
The RASSP Digest
, vol.3
-
-
Sheraga, R.J.1
-
21
-
-
0001530725
-
Calculi for synchrony and asynchrony
-
Milner, R.: Calculi for synchrony and asynchrony. Theoretical Computer Science 25 (1983) 267-310
-
(1983)
Theoretical Computer Science
, vol.25
, pp. 267-310
-
-
Milner, R.1
-
22
-
-
33645253673
-
A mathematical theory of synchronous communication
-
Oxford University Computing Laboratory
-
Barnes, J.E.: A mathematical theory of synchronous communication. Technical report, Oxford University Computing Laboratory (1993)
-
(1993)
Technical Report
-
-
Barnes, J.E.1
-
23
-
-
23844447138
-
Refining specifications to programmable logic
-
Derrick, J., Boiten, E., Woodcock, J., von Wright, J., eds.: Elsevier
-
Hilton, A.J., Hall, J.G.: Refining specifications to programmable logic. In Derrick, J., Boiten, E., Woodcock, J., von Wright, J., eds.: Proceedings of REFINE 2002. Volume 30 of Electronic Notes in Theoretical Computer Science., Elsevier (2002)
-
(2002)
Proceedings of REFINE 2002. Volume 30 of Electronic Notes in Theoretical Computer Science
-
-
Hilton, A.J.1
Hall, J.G.2
-
24
-
-
24644449664
-
BHDL: Circuit design in B
-
Lilius, J., Balarin, F., eds.: Laboratoire d'Informatique Fondamentale de Lille, Université de Compiègne, Institut National de Recherche sur les Transports et leur Sécurité
-
Aljer, A., Devienne, P., Tison, S., Boulanger, J.L., Mariano, G.: BHDL: Circuit design in B. In Lilius, J., Balarin, F., eds.: Third International Conference on Application of Concurrency to System Design, Laboratoire d'Informatique Fondamentale de Lille, Université de Compiègne, Institut National de Recherche sur les Transports et leur Sécurité (2003) 241
-
(2003)
Third International Conference on Application of Concurrency to System Design
, pp. 241
-
-
Aljer, A.1
Devienne, P.2
Tison, S.3
Boulanger, J.L.4
Mariano, G.5
-
26
-
-
33749031641
-
Interim Defence Standard 00-56 issue 3: Safety management requirements for defence systems
-
MoD:, UK Ministry of Defence
-
MoD: Interim Defence Standard 00-56 issue 3: Safety management requirements for defence systems. Technical report, UK Ministry of Defence (2005) http://www.dstan.mod.uk/.
-
(2005)
Technical Report
-
-
-
30
-
-
84958760002
-
Defence Standard 00-56 issue 2
-
MoD:, Ministry of Defence Safety Management Requirements for Defence Systems
-
MoD: Defence Standard 00-56 issue 2. Technical report, Ministry of Defence (1996) Safety Management Requirements for Defence Systems.
-
(1996)
Technical Report
-
-
-
31
-
-
18644378920
-
Edwards v. National Coal Board
-
Asquith, J.: Edwards v. National Coal Board. All England Law Report 1 (1949) 747
-
(1949)
All England Law Report
, vol.1
, pp. 747
-
-
Asquith, J.1
-
32
-
-
84976723958
-
Validation of ultrahigh dependability for software-based systems
-
Littlewood, B., Strigini, L.: Validation of ultrahigh dependability for software-based systems. Communications of the ACM 36 (1993) 69-80
-
(1993)
Communications of the ACM
, vol.36
, pp. 69-80
-
-
Littlewood, B.1
Strigini, L.2
-
34
-
-
0031188429
-
A refinement calculus for the synthesis of verified hardware descriptions in VHDL
-
Breuer, P.T., Kloos, C.D., López, A.M., Madrid, A.M., Fernández, L.S.: A refinement calculus for the synthesis of verified hardware descriptions in VHDL. ACM Transactions on Programming Languages and Systems 19 (1997) 586-616
-
(1997)
ACM Transactions on Programming Languages and Systems
, vol.19
, pp. 586-616
-
-
Breuer, P.T.1
Kloos, C.D.2
López, A.M.3
Madrid, A.M.4
Fernández, L.S.5
-
36
-
-
0043092223
-
High level formal verification of next-generation microprocessors
-
Intel Corporation, ACM Press
-
Schubert, T.: High level formal verification of next-generation microprocessors. In: Proceedings of the 40th Design Automation Post-Conference, Intel Corporation, ACM Press (2003)
-
(2003)
Proceedings of the 40th Design Automation Post-conference
-
-
Schubert, T.1
-
37
-
-
26944454198
-
CSP/FDR2 to Handel-C translation
-
Department of Computer Science, University of York
-
Stepney, S.: CSP/FDR2 to Handel-C translation. Technical Report YCS-2002-357, Department of Computer Science, University of York (2003)
-
(2003)
Technical Report YCS-2002-357
-
-
Stepney, S.1
-
38
-
-
84941358063
-
SPARK: A high-level synthesis framework for applying parallelizing compiler transformations
-
Ranganathan, N., ed.: Center for Embedded Computer Systems, University of California at Irvine
-
Gupta, S., Dutt, N., Gupta, R., Nicolau, A.: SPARK: a high-level synthesis framework for applying parallelizing compiler transformations. In Ranganathan, N., ed.: Proceedings of the Sixteenth International Conference on VLSI Design, Center for Embedded Computer Systems, University of California at Irvine (2003)
-
(2003)
Proceedings of the Sixteenth International Conference on VLSI Design
-
-
Gupta, S.1
Dutt, N.2
Gupta, R.3
Nicolau, A.4
-
39
-
-
33749034565
-
High-integrity interfacing to programmable logic with Ada
-
Llamosi, A., Strohmeier, A., eds.
-
Hilton, A.J., Hall, J.G.: High-integrity interfacing to programmable logic with Ada. In Llamosi, A., Strohmeier, A., eds.: Proceedings of the 9th International Conference on Reliable Software Technologies (Ada-Europe 2004). (2004)
-
(2004)
Proceedings of the 9th International Conference on Reliable Software Technologies (Ada-Europe 2004)
-
-
Hilton, A.J.1
Hall, J.G.2
-
43
-
-
33749037799
-
Quartz: A new language for hardware description
-
Department of Computing, Imperial College of Science, Technology and Medicine
-
Pell, O.: Quartz: A new language for hardware description. Final year project report, Department of Computing, Imperial College of Science, Technology and Medicine (2004)
-
(2004)
Final Year Project Report
-
-
Pell, O.1
-
44
-
-
33749025103
-
Practical guide to certification and re-certification of AAvA software elements: Software for programmable logic devices
-
QinetiQ
-
Hilton, A.: Practical guide to certification and re-certification of AAvA software elements: Software for programmable logic devices. Technical report, QinetiQ (2003)
-
(2003)
Technical Report
-
-
Hilton, A.1
-
46
-
-
69249181461
-
Field-programmable logic and applications: From FPGAs to computing paradigm8th international workshop (FPL'98), proceedings
-
Hartenstein, R.W., Keevallik, A., eds.: Hartenstein, R.W., Keevallik, A., eds.: Proceedings of the 8th International Workshop on Field Programmable Logic (FPL'98). Springer-Verlag
-
Hartenstein, R.W., Keevallik, A., eds.: Field-Programmable Logic and Applications: From FPGAs to Computing Paradigm, 8th International Workshop (FPL'98), Proceedings. In Hartenstein, R.W., Keevallik, A., eds.: Proceedings of the 8th International Workshop on Field Programmable Logic (FPL'98). Volume 1482 of Lecture Notes In Computer Science., Springer-Verlag (1998)
-
(1998)
Lecture Notes in Computer Science
, vol.1482
-
-
|