IIP2 and DC Offsets in the Presence of Leakage at LO Frequency

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 53, Issue 8, 2006, Pages 647-651

  Balsara, Poras T ^b   Muhammad, Khurram ^a  

^a TEXAS INSTRUMENTS   (United States)

^b UNIVERSITY OF TEXAS AT DALLAS   (United States)

Author keywords

DC offsets; direct conversion receiver (DCR); local oscillator (LO) leakage; second order input intercept point (IIP2); third order input intercept point (IIP3)

Indexed keywords

CMOS INTEGRATED CIRCUITS; DISTORTION (WAVES); GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; PATTERN MATCHING; TRANSCEIVERS;

DC OFFSETS; DIRECT CONVERSION RECEIVER (DCR); LOCAL OSCILLATOR (LO) LEAKAGE; SECOND-ORDER INPUT INTERCEPT POINT (IIP2); THIRD-ORDER INPUT INTERCEPT POINT (IIP3);

OSCILLATORS (ELECTRONIC);

EID: 33748564984     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2006.876469     Document Type: Article

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