Algorithm/Architecture co-design of the generalized sampling theorem based de-interlacer

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 2943-2946

  Beri'c, Aleksandar ^a   Haan, Gerard De ^b   Sethuraman, Ramanathan ^b   Meerbergen, Jef Van ^b  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHM/ARCHITECTURE CO-DESIGN; APPLICATION DOMAINS; BREAK-UP; COMMUNICATION BANDWIDTH; COMPUTATIONAL LOADS; DE-INTERLACING; DE-INTERLACING METHOD; GENERALIZED SAMPLING THEOREMS; LOCALITY OF REFERENCE; MEMORY BANDWIDTHS; MOTION ESTIMATION AND MOTION COMPENSATION; MOTION ESTIMATOR; MULTI-LEVEL; MULTI-PROCESSOR; PROCESSING ARCHITECTURES; PROCESSING CHAIN; QUALITY LOSS; SCRATCH PAD MEMORY;

BANDWIDTH; DIGITAL TELEVISION; IMAGE QUALITY; MOTION COMPENSATION; MOTION ESTIMATION; TELECOMMUNICATION SYSTEMS; TELEVISION BROADCASTING; VIDEO SIGNAL PROCESSING;

COMPUTER ARCHITECTURE;

EID: 33748556830     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465244     Document Type: Conference Paper

References (9)

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