A 27 mW 1.1 mm2 motion estimator for picture-rate up-converter

Proceedings of the IEEE International Conference on VLSI Design

Volumn 17, Issue , 2004, Pages 1083-1088

  Berić, Aleksandar ^a   Sethuraman, Ramanathan ^b   Peters, Harm ^b   Van Meerbergen, Jef ^a,b   De Haan, Gerard ^a,b   Pinto, Carlos Alba ^b  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BANDWIDTH; COMPUTER SIMULATION; COMPUTER SOFTWARE; COSTS; DATA COMPRESSION; ELECTRIC CONVERTERS; FIELD PROGRAMMABLE GATE ARRAYS; INTERPOLATION; MOTION COMPENSATION;

HIGH-LEVEL-SYNTHESIS (HLS) TOOLS; STANDARD DEFINITION (SD); SUM-OF-ABSOLUTE-DIFFERENCE (SAD); VERY LONG INSTRUCTION WORD (VLIW);

MOTION ESTIMATION;

EID: 2342481696     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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