Modelling of the parametric yield in decananometer SRAM-Arrays

Advances in Radio Science

Volumn 4, Issue , 2006, Pages 281-285

  Fischer, Th ^a   Nirschl, T ^b   Lemaitre, B ^b   Schmitt Landsiedel, D ^a  

^a TECHNICAL UNIVERSITY OF MUNICH   (Germany)

^b INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

INTELLIGENT SYSTEMS; MONTE CARLO METHODS; STATIC RANDOM ACCESS STORAGE; THRESHOLD VOLTAGE;

DEVICE PARAMETERS; LOCAL VARIATIONS; MISMATCH EFFECTS; OPTIMAL SOLUTIONS; PARAMETRIC YIELD; SECURITY MARGINS; TECHNOLOGY OPTIONS; TRANSISTOR PARAMETERS;

TRANSISTORS;

EID: 33748538998     PISSN: 16849965     EISSN: 16849973     Source Type: Journal    
DOI: 10.5194/ars-4-281-2006     Document Type: Article

References (6)

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6. Luo, Z., et. al.: High Performance and Low Power Transistors Integrated in 65 nm Bulk CMOS Technology, Proc. IEEE IEDM, 661-664,2004.