Detection of trap generation in high-κ gate stacks due to constant voltage stress

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 2006, Pages 111-112

  Young, C D ^a   Heh, D ^a   Choi, R ^a   Peterson, J J ^a   Barnett, J ^a   Lee, B H ^b   Zeitzoff, P ^a   Brown, G A ^a   Bersuker, G ^a  

^a SEMATECH   (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTS; ELECTRON TRAPS; HAFNIUM COMPOUNDS; STABILITY; THICKNESS MEASUREMENT; THRESHOLD VOLTAGE;

CONSTANT VOLTAGE STRESS; STRESS-GENERATED ELECTRON TRAPS; THRESHOLD VOLTAGE INSTABILITY;

GATE DIELECTRICS;

EID: 33748114853     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTSA.2006.251089     Document Type: Conference Paper

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