Dynamic time-slot allocation for QoS enabled networks on chip

Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia

Volumn 2005, Issue , 2005, Pages 47-52

  Marescaux, T ^a   Bricke B ^a,b   Debacker, P ^a,b   Nollet, V ^a   Corporaal, H ^c  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMMUNICATION CHANNELS (INFORMATION THEORY); IMAGE CODING; QUALITY OF SERVICE; RANDOM ACCESS STORAGE; TIME DIVISION MULTIPLE ACCESS;

COMMUNICATION ARCHITECTURES; DYNAMIC TIME-SLOT ALLOCATION; SYSTEM-ON-CHIP;

MICROPROCESSOR CHIPS;

EID: 33747404179     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESTMED.2005.1518069     Document Type: Conference Paper

References (10)

1. H. De Man: On Nanoscale Integration and Gigascale Complexity in the Post .Com World. Proc. DATE 2002, Paris, France, March 2002.
2. S. Kumar, A. Jantsch, M. Millberg, J. berg, J. Soininen, M. Forsell, K. Tiensyrj, and A. Hemani, "A network on chip architecture and design methodology," in Proceedings, IEEE Computer Society Annual Symposium on VLSI, Apr. 2002.
3. T. Marescaux, J-Y. Mignolet, A. Bartic, W. Moffat, D. Verkest, S. Vernalde, R. Lauwereins, "Networks on Chip as Hardware Components of an OS for Reconfigurable Systems", Proc. Field Programmable Logic and Applications, Lisbon, 2003.
4. V. Nollet, T. Marescaux, D. Verkest, J-Y. Mignolet, S. Vernalde, "Operating System controlled Network-onChip", Proc. of the Design Automation Conference, San Diego, June 2004, pp. 256-259.
5. T.A. Bartic, J-Y. Mignolet, V. Nollet, T. Marescaux, D. Verkest, S. Vernalde, R. Lauwereins, "Highly Scalable Network on Chip for Reconfigurable Systems", Systems on Chip Conference, Tampere, 2003.
6. A. Radulescu, et al., "An Efficient On-Chip Network Interface Offering Guaranteed Services, SharedMemory Abstraction, and Flexible Network Programming", IEEE Transactions on CAD of Integrated Circuits and Systems, January 2005.
7. O. P. Gangwal, et al., "Building Predictable Systems on Chip: An Analysis of Guaranteed Communication in the AEthereal Network on Chip", Dynamic and Robust Streaming In and Between Connected ConsumerElectronics Devices, Kluwer, 2005.
8. A. Jantsch and H. Tenhunen, "Will Networks on Chip Close the Productivity Gap", Networks on Chip, Kluwer, 2003.
9. S. J. Ruussel and P. Norvig, "Artificial Intelligence: a modern approach", Prentice Hall, 1995.
10. W. Piekarski and B. Thomas, "ARQuake: The Outdoor Augmented Reality Gaming System", ACM Communications, Vol. 45, No. 1, pp 36-38, Jan 2002.