Using DSP blocks for ROM replacement: A novel synthesis flow

Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL

Volumn 2005, Issue , 2005, Pages 77-82

  Morris, Gareth W ^a   Constantinides, George A ^a   Cheung, Peter Y K ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

DSP BLOCKS; EMBEDDED MULTIPLICATION; QUARTUS UNIVERSITY INTERFACE PROGRAM (QUIP); SYNTHESIS FLOW;

ALGORITHMS; BENCHMARKING; COMPUTER SOFTWARE; CONSTRAINT THEORY; FIELD PROGRAMMABLE GATE ARRAYS; POLYNOMIAL APPROXIMATION;

ROM;

EID: 33746891260     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2005.1515702     Document Type: Conference Paper

References (8)

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