Design trade-offs for user-level I/O architectures

IEEE Transactions on Computers

Volumn 55, Issue 8, 2006, Pages 962-973

  Schaelicke, Lambert ^a   Davis, Alan L ^b  

^a INTEL CORPORATION   (United States)

^b UNIVERSITY OF UTAH   (United States)

Author keywords

Architecture; Input output devices; Performance analysis; Simulation; User level

Indexed keywords

COMPUTER HARDWARE; DISTRIBUTED COMPUTER SYSTEMS; INTERCONNECTION NETWORKS; USER INTERFACES;

INPUT/OUTPUT DEVICES; USER-LEVEL ARCHITECTURES;

COMPUTER ARCHITECTURE;

EID: 33746871417     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2006.122     Document Type: Article

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