Cache based power analysis attacks on AES

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4058 LNCS, Issue , 2006, Pages 17-28

  Fournier, Jacques ^a,b   Tunstall, Michael ^c  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^b GEMPLUS   (France)

^c UNIVERSITY OF LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN ALGEBRA; COMPUTER SOFTWARE; INFORMATION ANALYSIS; PROGRAM PROCESSORS; SMART CARDS;

BOOLEAN DATA MASKING TECHNIQUES; CACHE BASED POWER ANALYSIS; POWER ANALYSIS; SIDE-CHANNEL INFORMATION;

BUFFER STORAGE;

EID: 33746329953     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11780656_2     Document Type: Conference Paper

References (16)

1. M.-L. Akkar and C. Giraud. An implementation of DES and AES secure against some attacks. In Ç. K. Koç, D. Naccache, and C. Paar, editors, Cryptogaphic Hardware and Embedded Systems - CHES 2001, volume 2162 of Lecture Notes in Computer Science, pages 309-318. Springer-Verlag, 2001.
2. D. J. Bernstein. Cache timing attacks on AES, 2004. http://cr.yp.to/ antiforgery/cachetiming-20050414.pdf.
3. G. Bertoni, V. Zaccaria, L. Breveglieri, M. Monchiero, and G. Palermo. AES power attack based on induced cache miss and countermeasures. In International Symposium on Information Technology: Coding and Computing - ITCC 2005, pages 586-591. IEEE Computer Society, 2005.
4. C. Clavier, J.-S. Coron, and N. Dabbous. Differential power analysis in the presence of hardware countermeasures. In Ç. K. Koç and C. Paar, editors, Cryptographic Hardware and Embedded Systems - CHES 2000, volume 1965 of Lecture Notes in Computer Science, pages 252-263. Springer-Verlag, 2000.
5. J. L. Hennessy and D. A. Patterson. Computer Architecture: A Quantitative Approach. Morgan Kaufmann, 2003.
6. P. Kocher, J. Jaffe, and B. Jun. Differential power analysis. In M. J. Wiener, editor, Advances in Cryptology - CRYPTO '99, volume 1666 of Lecture Notes in Computer Science, pages 388-397. Springer-Verlag, 1999.
7. T. S. Messerges. Power Analysis Attacks and Countermeasures for Cryptographic Algorithms. PhD thesis, University of Illinois, Chicago, 2000.
8. MIPS-Technologies. SmartMIPS ASE. http://www.mips.com/content/Products/.
9. MIPS-Technologies. MIPS™architecture for programmers volume I: Introduction to the MIPS32™architecture. Technical Report MD00082, Revision 0.95, March 2001.
10. National Institute of Standards and Technology. Advanced encryption standard (AES) (FIPS-197), 2001.
11. D. A. Osvik, A. Shamir, and E. Tromer. Cache attacks and countermeasures: the case of AES. In D. Pointcheval, editor, Topics in Cryptology - CT-RSA 2006, volume 3860 of Lecture Notes in Computer Science, pages 1-20. Springer-Verlag, 2006.
12. D. Page. Theoretical use of cache memory as a cryptanalytic side-channel. Cryptology ePrint Archive, Report 2002/169, 2002. http://eprint.iacr.org/.
13. D. Page. Defending against cache based side-channel attacks. Information Security Technical Report, 8(1):30-44, April 2003.
14. J. R. Rao, P. Rohatgi, H. Scherzer, and S. Tinguely. Partitioning attacks: or how to rapidly clone some gsm cards. In Proceedings of the IEEE Symposium on Security and Privacy, pages 31-41, 2002.
15. Infineon Technologies AG Secure and Mobile Solutions Security Group. Security & chip cards ICs SLE88Cx4000P, preliminary short product information 04.03, 2003.
16. Y. Tsunoo, T. Saito, T. Suzaki, M. Shigeri, and H. Miyauchi. Cryptanalysis of DES implemented on computers with cache. In C. D. Walter, Ç. K. Koç, and C. Paar, editors, Cryptographic Hardware and Embedded Systems - CHES 2003, volume 2779 of Lecture Notes in Computer Science, pages 62-76. Springer-Verlag, 2003.