Combined method of copper electroplating deposition and low temperature melting for damascene technology

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6260, Issue , 2006, Pages

  Redichev, E N ^a   Gromov, D G ^a   Gavrilov, S A ^a   Mochalov, A I ^a   Ammosov, R M ^b  

^a NATIONAL RESEARCH UNIVERSITY OF ELECTRONIC TECHNOLOGY   (Russian Federation)

^b KAPITZA INSTITUTE FOR PHYSICAL PROBLEMS   (Russian Federation)

Author keywords

Copper; Damascene; Electroplating; Interconnection; Melting

Indexed keywords

ANNEALING; COPPER PLATING; DEPOSITION; MELTING; SURFACE TREATMENT; WETTING;

DAMASCENE; INTERCONNECTION; LOW TEMPERATURE MELTING; WETTING LAYER;

ELECTROPLATING;

EID: 33746099336     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.683493     Document Type: Conference Paper

References (9)

1. J. G. Ryan, R. M. Geffken, N. R. Poulin, J. R. Paraszczak," The evolution of interconnection technology at IBM", IBM J. Res. Develop., 39, 371-381, 1995.
2. S. Roehl. L. Carnilletti, W. Cote, D. Cote, E. Eckstein, K. H. Froehner, P. I. Lee, D. Restaino, G. Roeska, V. Vynorius, S. Wolff, B. Vollmer, "High density damascene wiring and borderless contacts for 64M DRAM", Proceedings of the 9th International VLSZ Multilevel Interconnection Conference, 22-28, 1992.
3. B. Vollmer, T. Licata, D. Restaino, and J. G. Ryan, "Recent Advances in the Application of Collimated Sputtering,", Thin Solid Films, 247, 104-111, 1994.
4. B. Luther, J. F. White, C. Uzoh, T. Cacouris, J. Hummel, W. Guthrie, N. Lustig, S. Greco, N. Greco, S. Zuhoski, P. Agnello, E. Colgan, S. Mathad, L. Saraf, E. J. Weitzman, C. .K. Hu, F. Kaufinan, L. P. Buchwalter, S. Reynolds, C. Smart, D. Edelstein, E. Baran, S. Cohen, C. M. Knoedler, J. Malinowski, J. Horkans, H. Deligianni, J. Harper, P. C. Andricacos, J. Paraszczak, D. J. Pearson, M. Small, "Planar Copper-Polyimide Back End of the Line Interconnections for ULSI Devices", Proceedings of the 10th International VZSI Multilevel Interconnection Conference, 15-21, 1993.
5. C. W. Kaanta, S. G. Bombardier, W. J. Cote, W. R. Hill, G. Kerszykowski, H. S. Landis, D. J. Poindexter, C. W. Pollard, G. H. Ross, J. G. Ryan, S. Wolff, J. E. Cronin, "Dual Damascene: A ULSI Wiring Technology," Proceedings of the 8th International IEEE VLSI Multilevel Interconnection Conference, 144-152, 1991.
6. The International Roadmap for Semiconductors, www.itrs.net, 2003.
7. The International Roadmap for Semiconductors, www.itrs.net, 2004.
8. D.G.Gromov, A.I.Mochalov, A.G.Klimovitskiy, A.D.Sulimin, E.N.Redichev, "Approaches to diffusion barrier creation and trench filling for copper interconnection formation", Appl. Phys. A, 81, 1337-1343, 2005.
9. M. Hansen, K. Anderko, "Constitution of binary alloys", McGraw-Hill Book Company, Inc., New-York, Toronto, London, 1958.