Design, implementation, and verification of Active Cache Emulator (ACE)

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2006, Pages 63-72

  Hong, Jumnit ^a   Nurvitadhi, Eriko ^b   Lu, Shih Lien L ^a  

^a INTEL CORPORATION   (United States)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Cache modeling; FPGA based emulator; Real time emulation

Indexed keywords

BUFFER STORAGE; COMPUTER SIMULATION; COMPUTER SOFTWARE; FEEDBACK CONTROL; FIELD PROGRAMMABLE GATE ARRAYS; PROGRAM PROCESSORS; SYSTEMS ANALYSIS;

CACHE MODELING; FPGA-BASED EMULATORS; REAL-TIME EMULATION; RIGHTMARK MEMORY ANALYZER SOFTWARE;

COMPUTER AIDED DESIGN;

EID: 33745850485     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1117201.1117211     Document Type: Conference Paper

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