Efficient evolutionary approaches for the data ordering problem with inversion

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3907 LNCS, Issue , 2006, Pages 320-331

  Logofatu, Doina ^a   Drechsler, Rolf ^a  

^a UNIVERSITY OF BREMEN   (Germany)

Author keywords

Complexity; Data Ordering Problem; Digital Circuit Design; Evolutionary Algorithms; Graph Theory; Low Power; Optimization; Transition Minimization

Indexed keywords

DIGITAL CIRCUITS; ENERGY DISSIPATION; GRAPH THEORY; MATHEMATICAL OPERATORS; OPTIMIZATION; SWITCHING;

COMPLEXITY; DATA ORDERING PROBLEM; DIGITAL CIRCUIT DESIGN; LOW POWER; TRANSITION MINIMIZATION;

EVOLUTIONARY ALGORITHMS;

EID: 33745798374     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11732242_29     Document Type: Conference Paper

References (27)

1. Chandrakasan, A. P., Potkonjak, M., Rabaey, J., Brodersen, R. W.: HYPER-LP: a system for power minimization using architectural transformations. In Int'l Conf on CAD, pages 300-303, 1992
2. Cormen, T. H., Leiserson, C. E., Rivest, R. L., Stein, C.: Introduction to Algorithms, Second Edition, The MIT Press; 2nd edition (September 1, 2001)
3. Davis, L.: Applying adaptive algorithms to epistatic domains. In Proceedings of IJCAI, pages 162-164, 1985
4. Davis, L.: Handbook of Genetic Algorithms, van Nostrand Reinhold, New York, 1991
5. De Micheli, G.: Synthesis and Optimization of Digital Circuits. McGraw-Hill, Inc., 1994
6. Devadas, S., Malik, S.: A survey of optimization techniques targeting low power VLSI circuits. In Design Automation Conf., pages 242-247, 1995
7. Drechsler, N., Drechsler, R.: Exploiting don't cares during data sequencing using genetic algorithms. In ASP Design Automation Conf., pages 303-306, 1999
8. Drechsler, R.: Evolutionary Algorithms for VLSI CAD. Kluwer Academis Publisher, 1998
9. Drechsler, R., Drechsler, N.: Evolutionary Algorithms for Embedded System Design. Kluwer Acadmeic Publisher, 2002
10. Drechsler, R., Gockel, N.: A genetic algorithm for data sequencing. Electronic Letters, 33(10): 843-845, 1997
11. Drechsler, R., Drechsler, N.: Minimization of Transitions by Complementation and Resequencing using Evolutionary Algorithms, In Proceedings of 21st IASTED International Multi-Conference Applied Informatics (AI 2003), IASTED International Conference on Artificial Intelligence and Applications (AIA 2003), Innsbruck, 2003
12. Garey, M. R., Johnson, D. S.: Computers and Intractability - A Guide to NP-Completeness. Freeman, San Francisco, 1979
13. Goldberg, D. E., Lingle, R.: Alleles, loci, and the traveling salesman problem. In Int'l Conference on Genetic Algorithms, pages 154-159, 1985
14. Holland, J. H.: Adaption in Natural and Artificial Systems. The University of Michigan Press, Ann Arbor, MI, 1975
15. Iman, S., Pedram, M.: Multilevel network optimization for low power. In Int'l Conf. On CAD, pages 372-377, 1994
16. Mazumder, P., Rudnick, E.: Genetic Algorithms for VLSI Design, Layout & Test Automation. Prentice Hall, 1998
17. Michalewicz, Z.: Genetic Algorithms + Data Structures = Evolution Programs. 3rd edn. Springer-Verlag, Berlin Heidelberg New York (1996)
18. Murgai, R., Fujita, M., Krishnan, S. G: Data sequencing for minimum-transition transmission. In IFIP Int'l Conf. on VLSI, 1997
19. Murgai, R., Fujita, M., Oliveira, A.: Using complementation and resequencing to minimize transitions. In Design Automation Conf., pages 694-697, 1998
20. Oliver, I. M., Smith, D. J., Holland, J. R. C: A study of permutation crossover operators on the traveling salesman problem. In Int'l Conference on Genetic Algorithms, pages 224-230, 1987
21. Shen, W.-Z., Lin, J.-Y., Wang, F.-W.: Transistor reordering rules for power reduction in CMOS gates. In ASP Design Automation Conf., pages 1-6, 1995
22. Stan, M., Burleson, W.: Limited-weight codes for low-power I/O. Int'l Workshop on Low Power Design, 1994
23. Tiwari, V., Malik, S., Wolfe, A., Lee, M.: Power analysis of embedded software: A first step towards software power minimization. In Int'l Conf. on CAD, pages 384-390, 1994
24. Tiwari, V., Malik, S., Wolfe, A., Lee, M.: Instruction level power analysis and optimization software. In VLSI Design Conf., 1996
25. Tsui, C., Pedram, M., Despain, A. M.: Technology decomposition and mapping targeting low power dissipation. In Design Automation Conf., pages 68-73, 1993
26. Vaishnav, H., Pedram, M.: PCUBE: A performance driven placement algorithm for low power design. In European Design Automation Conf., pages 72-77, 1993
27. Whitley, D., Starkweather, T., Fuquay, D.: Scheduling problems and traveling salesman: The genetic edge recombination operator. In Int'l Conference on Genetic Algorithms, pages 133-140, 1989