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Volumn 2005, Issue , 2005, Pages 149-154

3-D frequency-dependent RLC elements extraction by full wave analysis: Identification of the return current paths in complex power and ground grids of high speed VLSI circuits

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION SYSTEMS; DIGITAL CIRCUITS; FINITE ELEMENT METHOD; SWITCHES;

EID: 33745493828     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SPI.2005.1500929     Document Type: Conference Paper
Times cited : (4)

References (8)
  • 1
    • 0001096424 scopus 로고    scopus 로고
    • On-chip wiring design challenges for gigahertz operation
    • April
    • A. Deutsch, P. W. Coteus, and G. V. Kopscay, "On-chip wiring design challenges for gigahertz operation," Proc. IEEE, vol. 89, no. 4, pp. 529-555, April 2001.
    • (2001) Proc. IEEE , vol.89 , Issue.4 , pp. 529-555
    • Deutsch, A.1    Coteus, P.W.2    Kopscay, G.V.3
  • 2
    • 0032683656 scopus 로고    scopus 로고
    • On-chip inductance issues in multiconductor systems
    • June
    • S. Morton, "On-chip inductance issues in multiconductor systems," Proc. Design Automation Conference, pp. 921-926, June 1999.
    • (1999) Proc. Design Automation Conference , pp. 921-926
    • Morton, S.1
  • 4
    • 0001613048 scopus 로고    scopus 로고
    • Mesh-structured on-chip power/ground: Design for minimum inductance and characterization for fast R, L extraction
    • May
    • A. Sinha, and S. Chowdhury, "Mesh-structured on-chip power/ground: Design for minimum inductance and characterization for fast R, L extraction," Proc. Custom Integrated Circuits Conference, pp. 461-464, May 1999.
    • (1999) Proc. Custom Integrated Circuits Conference , pp. 461-464
    • Sinha, A.1    Chowdhury, S.2
  • 5
    • 0001032562 scopus 로고
    • Inductance calculations in a complex integrated circuit environment
    • September
    • A. Ruelhi, "Inductance calculations in a complex integrated circuit environment," IBM J. Res. Dev., pp. 470-481, September 1972.
    • (1972) IBM J. Res. Dev. , pp. 470-481
    • Ruelhi, A.1
  • 6
    • 0037002397 scopus 로고    scopus 로고
    • Inductance model and analysis methodology for high speed on-chip interconnect
    • December
    • K. Gala, D. Blaauw, V. Zolotov, P. Vaidya, and A. Joshi, "Inductance model and analysis methodology for high speed on-chip interconnect," IEEE Trans. On VLSI Systems, vol. 10, no. 6, pp. 730-745, December 2002.
    • (2002) IEEE Trans. on VLSI Systems , vol.10 , Issue.6 , pp. 730-745
    • Gala, K.1    Blaauw, D.2    Zolotov, V.3    Vaidya, P.4    Joshi, A.5
  • 7
    • 0026206167 scopus 로고
    • Full wave analysis of dielectric waveguides using tangential vector finite elements
    • August
    • J. F. Lee, D. K. Sun, and Z. J. Cendes, "Full Wave Analysis of Dielectric Waveguides using Tangential Vector Finite Elements," IEEE Trans. Microwave Theory & Tech., vol. 39, no. 8, pp. 1262-1271, August 1991.
    • (1991) IEEE Trans. Microwave Theory & Tech. , vol.39 , Issue.8 , pp. 1262-1271
    • Lee, J.F.1    Sun, D.K.2    Cendes, Z.J.3
  • 8
    • 0026908091 scopus 로고
    • S-parameter-based IC interconnect transmission line characterization
    • August
    • W. R. Eisenstadt, and Y. Eo, "S-parameter-Based IC Interconnect Transmission Line Characterization," IEEE Trans. on Components, Hybrids, and Man. Tech., vol. 15, no. 4, pp. 483-490, August 1992.
    • (1992) IEEE Trans. on Components, Hybrids, and Man. Tech. , vol.15 , Issue.4 , pp. 483-490
    • Eisenstadt, W.R.1    Eo, Y.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.