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Volumn , Issue , 1999, Pages 349-358

Switched-capacitor circuit techniques in submicron low-voltage CMOS

Author keywords

[No Author keywords available]

Indexed keywords


EID: 33745449613     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICVC.1999.820929     Document Type: Conference Paper
Times cited : (11)

References (12)
  • 4
    • 0028483735 scopus 로고
    • Switched opamp: An approach to realize full CMOS SC circuits at very low supply voltages
    • Aug.
    • J. Crols and M. Steyaert, "Switched opamp: an approach to realize full CMOS SC circuits at very low supply voltages," IEEE J. Solid-State Circuits, vol. 29, no. 8, pp. 936-942, Aug. 1994.
    • (1994) IEEE J. Solid-State Circuits , vol.29 , Issue.8 , pp. 936-942
    • Crols, J.1    Steyaert, M.2
  • 5
    • 0031641129 scopus 로고    scopus 로고
    • A 1.5-V, 10-bit, 14 MS/s CMOS pipeline analog-to-digital converter
    • June
    • A. Abo and P. Gray, "A 1.5-V, 10-bit, 14 MS/s CMOS pipeline analog-to-digital converter," Symp. VLSI Circuits, pp. 166-169, June 1998.
    • (1998) Symp. VLSI Circuits , pp. 166-169
    • Abo, A.1    Gray, P.2
  • 7
    • 0026138627 scopus 로고
    • Experimental 1.5V 64Mb DRAM
    • April
    • Y. Nakagome et al., "Experimental 1.5V 64Mb DRAM," IEEE J. Solid-State Circuits, vol. 26, no. 4, pp. 465-472, April 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , Issue.4 , pp. 465-472
    • Nakagome, Y.1
  • 8
    • 0031192291 scopus 로고    scopus 로고
    • A 1.5-V 100-/iW delta-sigma modulator with 12-b dynamic range using the switched-opamp technique
    • July
    • V. Peluso, M.S.J. Steyaert, and W. Sansen, "A 1.5-V 100-/iW delta-sigma modulator with 12-b dynamic range using the switched-opamp technique," IEEE J. Solid-State Circuits, pp. 943-952, July 1997.
    • (1997) IEEE J. Solid-State Circuits , pp. 943-952
    • Peluso, V.1    Steyaert, M.S.J.2    Sansen, W.3
  • 10
    • 0031333312 scopus 로고    scopus 로고
    • A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR
    • Dec.
    • T. Brooks et al, "A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR," IEEE J. Solid-State Circuits, vol. 32, no. 12, pp. 18961906, Dec. 1997.
    • (1997) IEEE J. Solid-State Circuits , vol.32 , Issue.12 , pp. 18961906
    • Brooks, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.