Zero-crosstalk bus line structure for global interconnects in Si ultra large scale integration

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 45, Issue 6 A, 2006, Pages 4977-4981

  Kimura, Makoto ^a   Ito, Hiroyuki ^a   Sugita, Hideyuki ^a   Okada, Kenichi ^a   Masu, Kazuya ^a  

^a Tokyo Institute of Technology ^*  (Japan)

Author keywords

Crosstalk; Differential transmission line; Global interconnect; On chip; Wiring area

Indexed keywords

ELECTROMAGNETISM; INTERCONNECTION NETWORKS; SILICON;

DIFFERENTIAL TRANSMISSION LINE; GLOBAL INTERCONNECT; ON-CHIP; WIRING AREA;

CROSSTALK;

EID: 33745257249     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.45.4977     Document Type: Article

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