Enhancing microprocessor immunity to power supply noise with clock/data compensation

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn 2005, Issue , 2005, Pages 16-19

  Rahal Arabi, Tawfik ^a   Taylor, Greg ^a   Barkatullah, Javed ^a   Wong, Keng L ^a   Ma, Matthew ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA COMPENSATION; DECOUPLING; IMPEDANCE SPECTRUM; ON-DIE CAPACITANCE;

CAPACITANCE; ELECTRIC IMPEDANCE; ELECTRIC POWER DISTRIBUTION; ELECTRIC POWER SUPPLIES TO APPARATUS; LEAKAGE CURRENTS; SPURIOUS SIGNAL NOISE;

MICROPROCESSOR CHIPS;

EID: 33745163601     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2005.1469323     Document Type: Conference Paper

References (2)

1. T. Rahal-Arabi, G. Taylor, M. Ma, C. Webb, "Design and validation of the Pentium® III and Pentium® 4 processors power delivery", 2002 Symposium on VLSI Circuits, 2002, pages: 220-223.
2. Gang Ji, Tawfik Arabi, Greg Taylor, "Design and Validation of a Power Supply Noise Reduction Technique", Electrical Performance of Electronic Packaging, 2003.