Enabling loop fusion and tiling for cache performance by fixing fusion-preventing data dependences

Proceedings of the International Conference on Parallel Processing

Volumn 2005, Issue , 2005, Pages 107-115

  Xue, Jingling ^a   Huang, Qingguang ^a   Guo, Minyi ^b  

^a UNIVERSITY OF NEW SOUTH WALES   (Australia)

^b UNIVERSITY OF AIZU   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; ITERATIVE METHODS; NUMERICAL METHODS;

DATA DEPENDENCES; LOOP FUSION; LOOP NESTS; SGI OCTANE2 SYSTEM;

DATA STRUCTURES;

EID: 33745123350     PISSN: 01903918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPP.2005.37     Document Type: Conference Paper

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