Formal Verification of the Quasi-Static Behavior of Mixed-Signal Circuits by Property Checking

Electronic Notes in Theoretical Computer Science

Volumn 153, Issue 3 SPEC. ISS., 2006, Pages 23-35

  Freibothe, Martin ^a   Schönherr, Jens ^a   Straube, Bernd ^a  

^a FRAUNHOFER INSTITUTE FOR INTEGRATED CIRCUITS   (Germany)

Author keywords

bounded model checking; mixed signal; quasi static

Indexed keywords

FINITE ELEMENT METHOD; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; SIGNAL PROCESSING;

ARBITRARY ACCURACY; BOUNDED MODEL CHECKING; MIXED-SIGNAL; QUASI-STATIC;

MIXER CIRCUITS;

EID: 33744735330     PISSN: 15710661     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.entcs.2006.01.027     Document Type: Article

References (18)

1. Alur R., Courcoubetis C., Henzinger T.A., and Ho P.-H. Hybrid automata: An algorithmic approach to the specification and verification of hybrid systems. In: Grossmann R.L., Nerode A., Ravn A.P., and Rischel H. (Eds). Hybrid Systems. LNCS volume 736 (1993), Springer 209-229
2. B. Becker, M. Behle, F. Eisenbrand, M. Fränzle, M. Herbstritt, C. Herde, J. Hoffmann, D. Kröning, B. Nebel, I. Polian, and R. Wimmer. Bounded model checking and inductive verification of hybrid discrete-continuous systems. In ITG/GI/GMM-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen", 2004
3. Bemporad A., Ferrari-Trecate G., and Morari M. Observability and controllability of piecewise affine and hybrid systems. IEEE Trans. Automatic Control 45 (2000) 1864-1876
4. Cooperating validity checker lite (CVCL), version 1.1.0 (2004). http://verify.stanford.edu/CVCL/ University of Stanford
5. de Kleer J. How circuits work. Artificial Inteligence 24 (1984) 205-280
6. de Kleer J., and Brown J.S. A qualitative physics based on confluences. Artificial Inteligence 24 (1984) 7-83
7. Gnu multiple precision arithmetic library, version 4.1.2 (2003). http://www.swox.com/gmp/
8. S. Gupta, B.H. Krogh, and R.A. Rutenbar. Towards formal verification of analog designs. In Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on, pages 210- 217, Nov. 2004
9. Hartong W., Hedrich L., and Barke E. Model checking algorithms for analog verification. DAC'02: Proceedings of the 39th conference on Design automation (2002), ACM Press 542-547
10. S. Hendricx and L. Claesen. A symbolic modelling approach for the formal verification of integrated mixed-mode systems. In Proceedings of 3rd Designing Correct Circuits (DCC), September 1996
11. Hendricx S., and Claesen L. A symbolic core approach to the formal verification of integrated mixed-mode applications. Proceedings European Design & Test Conference (ED&TC) (1997), IEEE Computer Society 432-436
12. T.A. Henzinger. The theory of hybrid automata. In Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science (LICS 1996), pages 278-292, 1996
13. Henzinger T.A., Kopke P.W., Puri A., and Varaiya P. What's decidable about hybrid automata?. Twenty-Seventh Annual ACM Symposium on Theory of Computing. (STOC 1995) (1995), ACM 373-382
14. Henzinger T.A., and Raskin J.-F. Robust undecidability of timed and hybrid systems. In: Lynch N.A., and Krogh B.H. (Eds). Hybrid Systems: Computation and Control, Third International Workshop. (HSCC 2000). LNCS volume 1790 (2000), Springer 145-159
15. Lunze J. Künstliche Intelligenz für Ingenieure, volume II (1995), R. Oldenbourg Verlag, München, Wien
16. J. Schönherr, M. Freibothe, B. Straube, and J. Bormann. Semi-formal verification of the quasi-static behavior of mixed-signal cicruits by SAT-based property cchecking. In ISoLA, 2004
17. Stanford validity checker (SVC), version 1.1 (2003). http://verify.stanford.edu/SVC/ University of Stanford
18. Yovine S. Model checking timed automata. In: Rozenberg G., and Vaandrager F. (Eds). Lectures on Embedded Systems. LNCS volume 1494 (1998), Springer 114-152