Electronic system, platform, and package codesign

IEEE Design and Test of Computers

Volumn 23, Issue 3, 2006, Pages 220-233

  Madisetti, Vijay K ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL INTEGRATED CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; LINEAR INTEGRATED CIRCUITS; PRODUCT DESIGN;

PACKAGE CODESIGN; THERMAL DESIGN;

CHIP SCALE PACKAGES;

EID: 33744548282     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2006.67     Document Type: Article

References (8)

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3. V.K. Madisetti and A.J. Gadient, "Model Year Architectures," The RASSP Digest, vol. 2, qtr. 4, 1995; http://www.eda.org/rassp/ documents/newsletter/html/9584/news_2.html.
4. V. Madisetti and C. Arpnikanondt, A Platform-Centric Approach to System-on-Chip Design, Springer, 2005.
5. R. Tummala, G. White, and V. Sundaram, "SoP: Microelectronics System Packaging Technology for 21st Century: Prospects and Progress," Proc. 12th European Microelectronics and Packaging Conf., 1999, pp. 327-335.
6. M.J. Flynn and P. Hung, "Microprocessor Design Issues: Thoughts on the Road Ahead," IEEE Micro, vol. 25, no. 3, May/June 2005, pp. 16-31.
7. W. Krenik, D. Buss, and P. Rickert, "Choose the Best IC Integration Method when Designing a 3G Handset," 2005, http://www.us. design-reuse.com/articles/article10472.html.
8. P.A. Sandborn, "Economics of Embedded Passives," Integrated Passive Component Technology, R. Ulrich and L. Schaper, eds., Wiley-IEEE Press, 2003.